參數(shù)資料
型號(hào)： VPX3224E
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Video Pixel Decoders
中文描述： 視頻解碼器像素
文件頁(yè)數(shù)： 86/92頁(yè)
文件大?。?/td> 616K
代理商： VPX3224E
ADVANCE INFORMATION
VPX 322xE
MICRONAS INTERMETALL
86
FP-RAM VPX Back-End
Name
Default
Function
Mode
Number
of Bits
Address
Hex
HVREF
h’151
12
w/r
Start position of the programmable ‘video active’ and clock gating
The start position has to be an even value and is given relative to the
trailing edge of HREF. Programmable VACT is activated with bit[2] of
the control word (h’140)! When llcgate is active (h’153, bit[7]), this value
defines the start of LLC clocks within a line.
40
pval_start
bit[10:0]:
start of VACT reference signal
h’152
12
w/r
End position of the programmable ‘video active’ and clock gating
The end position has to be an even value and is given relative to the
trailing edge of HREF. When llcgate is active (h’153, bit[7]), this value
defines the end of LLC clocks within a line.
720
pval_stop
bit[10:0]:
end of VACT reference signal
h’153
12
w/r
HREF and VREF control
determines length and polarity of the timing reference signals
refsig
bit[1]:
HREF Polarity
0
active low
1
active high
0
hpol
bit[2]:
VREF Polarity
0
active high
1
active low
0
vpol
bit[5:3]:
VREF pulse width, binary value + 2
000:pulse width = 2
111: pulse width = 9
0
vlen
bit[6]:
1 disables field as output
setting this bit will force the ‘field’ pin to the high impedance
state
0
disfield
bit[7]:
1 enable gating of LLC and LLC2 with the programmable
‘video active’ (h’151/152). Note that four additional clocks
are inserted before and after to allow ITU-R656 operation.
0
llcgate
Output Multiplexer
h’154
12
w/r
Output Multiplexer
0
outmux
bit[7:0]:
Multi-purpose bits on Port B
determines the state of Port B when used as programmable
output
bmp
bit[8]:
activate multi-purpose bits on Port B
note that double clock mode has to be selected for this
option!
bmpon
bit[9]:
Port Mode
0
parallel_out, ‘single clock’, Port A & B = FO[15:0];
1
‘double clock’
Port A = FO[15:8] / FO[7:0],
Port B = programmable output/not used;
double
bit[10]:
switch ‘VBI active’ qualifier
0
connect ‘VBI active’ to VACT pin
1
connect ‘VBI active’ to TDO pin
vbiact
bit[11]:
reserved (must be set to zero)
Temporal Decimation
h’157
12
w/r
Number of frames to output within 3000 frames
This value will be activated only if the corresponding latch flag is set
(control word h’140, bit[10] ).
3000
tdecframes
相關(guān)PDF資料
PDF描述
VPX322XE Video Pixel Decoders
VQ1000J N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管)
VQ1000J N-Channel 60-V (D-S) MOSFET
VQ1001J Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode
VQ1001J N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓30V，夾斷電流0.83A的N溝道增強(qiáng)型MOSFET)
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