參數(shù)資料
型號: VPX3224E
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Video Pixel Decoders
中文描述: 視頻解碼器像素
文件頁數(shù): 62/92頁
文件大?。?/td> 616K
代理商: VPX3224E
ADVANCE INFORMATION
VPX 322xE
MICRONAS INTERMETALL
62
4.3.10.1. TTL Output Driver Description
The driving capability/strength is controlled by the state
of the two I
2
C registers F8
hex
and F9
hex
.
A special PVDD, PVSS supply is used only to support
the digital output pins. This means, inherently, that in
case of tri-state conditions, external sources should not
drive these signals above the voltage PVDD which sup-
plies the output pins.
Rise times are specified as a transition between 0.6 V to
2.4 V. Fall times are defined as a transition between
2.4 V to 0.6 V.
strength
0
strength
1
strength
2
strength
3
strength
4
strength
5
strength
6
strength = 7
Fig. 4–1:
Block diagram of the output stages
Note:
The drivers of the output pads are implemented
as a parallel connection of 8 tri-state buffers of the
same size. The buffers are enabled depending on the
desired driver strength. This opportunity offers the ad-
vantage of adapting the driver strength to on-chip and
off-chip constraints, e.g. to minimize the noise result-
ing from steep signal transitions.
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