
A
V
M
9
7
Composite
Video
S-Video
Connection point Rxx
should be the only
junction between digital
and analog groundplane.
An optimum solution would
be a connection
underneath the VPX 32xxE.
Please refer to the
layout recommendations
for details
We recommend to use only 20.25
MHz-Crystals which are compliant to
our specifications. Please refer to
Section 7.4 for a list of approved
crystal manufacturers
Composite
Video
Place the ceramic bypass
capacitors as close as
possible to VPX 32xxE.
The 5 V analog supply
should be as clean as
possible.
The output pins PA7 to PA0 and
PB7 to PB0 provide different
signals in specific modes as
follows. Please refer to Section
2.8 for details about the Video
Data Transfer and to Tables 6.2
and 6.5 for the use of the
Multi-purpose bits
Multi-purpose
ITU-656
Mode
Chrominance
Luminance
Luminance/Chrominance
PA7 to PA0
ITU-601 27 MHz
ITU-601 13.5 MHz
Lum./Chrominance/Sync
PB7 to PB0
Multi-purpose
PA2
PA1
PA7
PA6
PA4
PB1
PB2
PB5
PB6
PB7
PB4
PB3
PB0
I2C DATA
/RESET
/OUTPUT ENABLE
I2C CLOCK
HREF
VREF
FIELD
VACT
LLC
PA[7..0]
PIXCLK
PB[7..0]
3.3 V digital supply
3.3 V digital supply
3.3 V digital supply
3.3 V digital supply
5 V analog supply
C14
47nF
C6
330pF
C9
330pF
C8
330pF
L3
3.3uH
R6
10K
R5
10K
C5
330pF
L2
2.2uH
+
C13
10uF/10V
C15
4.7pF
C19
220nF
J1
MINI DIN4
4
5
3
1
2
C16
4.7pF
Y1
20.25 MHz
J2
RCA
C11
330pF
L4
3.3uH
C10
680nF
C12
330pF
C7
680nF
R3
75
R4
75
SINGLE CONNECTION POINT
Rxx
J3
RCA
R7
10K
C17
100nF
+
C18
22uF/10V
C21
100nF
+
C20
22uF/10V
R2
75
L1
2.2uH
C4
680nF
C1
1nF
C2
330pF
C3
330pF
R1
75
U1
VPX 32xxE
37
39
40
42
41
43
35
34
29
30
44
1
2
33
11
36
32
13
38
18
31
17
16
15
14
10
9
8
7
28
27
26
25
24
23
22
21
3
4
5
6
20
19
12
CIN
VIN1
VIN2
VIN3
VRT
ISGND
XTAL1
XTAL2
SDA
SCL
TMS
TDI
TCK
VDD
PVDD
AVDD
VSS
PVSS
AVSS
OE
RES
PA0
PA1
PA2
PA3
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
TDO (LLC2/DACT)
HREF
VREF
PREF
VACT
LLC
PIXCLK