參數(shù)資料
型號(hào): XE8807AMI026TLF
廠商: Semtech
文件頁(yè)數(shù): 115/143頁(yè)
文件大?。?/td> 0K
描述: IC MCU LOW PWR MTP FLASH 32-TQFP
標(biāo)準(zhǔn)包裝: 1
系列: XE880x
應(yīng)用: 感測(cè)機(jī)
核心處理器: Coolrisc816?
程序存儲(chǔ)器類(lèi)型: 閃存(11 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
輸入/輸出數(shù): 24
電源電壓: 2.4 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-TQFP
包裝: 標(biāo)準(zhǔn)包裝
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
產(chǎn)品目錄頁(yè)面: 585 (CN2011-ZH PDF)
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱(chēng): XE8807AMI026DKR
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Semtech 2006
www.semtech.com
12-4
XE8806A/XE8807A
Table 12-8 shows the different usages that can be made of port B with the order of priority. If a pin is selected to be
analog, it overwrites the function and digital set-up. If the pin is not selected as analog, but a function is enabled, it
overwrites the digital set-up. If neither the analog nor function is selected for a pin, it is used as an ordinary digital
I/O. This is the default configuration at start-up.
Note: the presence of the functions is product dependent.
12.5
Port B analog capability
12.5.1
Port B analog configuration
Port B terminals can be attached to a 4 line analog bus by setting the PBAna[x] bits to 1 in the RegPBAna
register.
The other registers then define the connection of these 4 analog lines to the different pads of Port B. These can be
used to implement a simple LCD driver or A/D converter. Analog switching is available only when the circuit is
powered with sufficient voltage (see specification below). Below the specified supply voltage, only voltages that are
close to VSS or VBAT can be switched.
When PBAna[x] is set to 1, one pad of the Port B terminals is changed from digital I/O mode to analog. The usage
of the registers RegPBPullup, RegPBOut and RegPBDir define the analog configuration (see Table 12-9).
When PBAna[x] = 1, then PBPullup[x] connects the pin to the analog bus. PBDir[x] and PBPOut[x] select which
of the 4 analog lines is used.
analog bus selection
PBDir[x]
PBout[x]
PBPullup[x]
PB[x] selection on
0
1
analog line 0
0
1
analog line 1
1
0
1
analog line 2
1
analog line 3
X
0
High impedance
Table 12-9: Selection of the analog lines with RegPBDir, RegPBout and RegPBPullup when PBAna[x] = 1
Example:
Set the pads PB[2] and PB[5] on the analog line 3. (the values X depend on the configuration of others
pads)
-
apply high impedance in the analog mode (move RegPBPullup,#0bXX0XX0XX)
-
go to analog mode (move RegPBAna,#0bXX1XX1XX)
-
select the analog line3 (move RegPBDir,#0bXX1XX1XX and move RegPBOut,#0bXX1XX1XX)
-
apply the analog line to the output (move RegPBPullup,#0bXX1XX1XX)
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