參數(shù)資料
型號: XE8807AMI026TLF
廠商: Semtech
文件頁數(shù): 131/143頁
文件大小: 0K
描述: IC MCU LOW PWR MTP FLASH 32-TQFP
標(biāo)準(zhǔn)包裝: 1
系列: XE880x
應(yīng)用: 感測機
核心處理器: Coolrisc816?
程序存儲器類型: 閃存(11 kB)
控制器系列: XE8000
RAM 容量: 512 x 8
接口: UART,USRT
輸入/輸出數(shù): 24
電源電壓: 2.4 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
包裝: 標(biāo)準(zhǔn)包裝
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
產(chǎn)品目錄頁面: 585 (CN2011-ZH PDF)
配用: XE8000MP-ND - PROG BOARD AND PROSTART2 CARD
其它名稱: XE8807AMI026DKR
Semtech 2006
www.semtech.com
14-8
XE8806A/XE8807A
start detection mode
name
RfifEnStart[1:0]
“None”
00
“protocol”
01
“external”
10
“pattern 8bits”
11
Table 14-13. Start detection mode selection
14.8.2.1
No start sequence detection
In this case, the interface will not look for a start sequence. The incoming data stream will be decoded according to
the selected PCM code and will be stored in the reception FIFO as soon as the reception mode is enabled. The
message start has to be detected by software.
14.8.2.2
“Protocol” start detection
The NRZ coding has no defined start sequence. Selecting the “protocol” start sequence in NRZ has the same
effect as no start detection.
In the bi-phase or Manchester code, any protocol violation is considered as a start sequence i.e. a 1-level or 0-level
which is longer than the duration of a chip. An example is shown in Figure 14-3.
In the delay modulation or Miller coding, any protocol violation is considered as a start sequence i.e. a 1-level or 0-
level which is longer than the duration of 2 chips.
Figure 14-3 : Start sequence type in Bi-Phase-Level encoding
14.8.2.3
“External” start detection
An external start detection signal can be used. This signal should be connected to the pin RFIF2. The falling edge
of RFIF2 (also called “match”, see Figure 14-1) indicates the first valid bit of the message. This edge has to occur
during the first half of the first bit as shown in Figure 14-4. The minimal width of the pulse is half a bit.
Bi-Phase - Level
1
0
100
11
101
0
010
11
0
1
start sequence
5 x '1'
other
start
sequence
3 x '0'
codes
first valid bit
bit sequence
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