- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376454 > XR16C872 (Exar Corporation) Dual UART with 1284 Parallel Port and Plug-and-Play（PnP） Controller(雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器）) PDF資料下載
參數(shù)資料
| 型號： | XR16C872 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with 1284 Parallel Port and Plug-and-Play（PnP） Controller(雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器）) |
| 中文描述： | 雙UART）與1284并行端口，插頭插即用（PnP）功能控制器（雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器） |
| 文件頁數(shù)： | 36/60頁 |
| 文件大?。?/td> | 314K |
| 代理商： | XR16C872 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當前第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
XR16C872
36
Rev. P1.00
Preliminary
Cont-3
Cont-2
Cont-1
Cont-0
TX, RX software flow controls
0
1
0
1
X
X
X
1
0
0
1
1
X
X
X
0
X
X
X
X
0
1
0
1
X
X
X
X
0
0
1
1
No transmit flow control
Transmit Xon1/Xoff1
Transmit Xon2/Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Transmit Xon1/ Xoff1.
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
Transmit Xon2/Xoff2
Receiver compares Xon1 and Xon2/Xoff1 and Xoff2
Transmit Xon1 and Xon2/Xoff1 and Xoff2
Receiver compares Xon1 and Xon2/Xoff1 and Xoff2
No transmit flow control
Receiver compares Xon1 and Xon2/Xoff1 and Xoff2
0
1
1
1
1
1
1
1
0
0
1
1
Table 5. Software Flow Control Registers
EFR BIT-4:
Enhanced function control bit. The content of the IER
bits 4-7, ISR bits 4-5, FCR bits 4-5, and MCR bits 5-7
can be modified and latched. After modifying any bits
in the enhanced registers, EFR bit-4 can be set to a
logic 0 to latch the new values. This feature prevents
existing software from altering or overwriting the UART
enhanced functions.
Logic 0 = disable/latch enhanced features. IER bits 4-
7, ISR bits 4-5, FCR bits 4-5, and MCR bits 5-7 are
saved to retain the user settings, then IER bits 4-7, ISR
bits 4-5, FCR bits 4-5, and MCR bits 5-7 are initialized
to the default values shown in the Internal Resister
Table. After a reset, the IER bits 4-7, ISR bits 4-5, FCR
bits 4-5, and MCR bits 5-7 are set to a logic 0 to be
compatible with ST16C550 mode. (normal default con-
dition).
Logic 1 = Enables the enhanced functions. When this
bit is set to a logic 1 all enhanced features of the UART
are enabled and user settings stored during a reset will
be restored.
EFR BIT-5:
Logic 0 = Special Character Detect Disabled (normal
default condition)
Logic 1 = Special Character Detect Enabled. The
UART compares each incoming receive character with
Xoff-2 data. If a match exists, the received data will be
transferred to FIFO and ISR bit-4 will be set to indicate
detection of special character. Bit-0 in the X-registers
corresponds with the LSB bit for the receive character.
When this feature is enabled, the normal software flow
control must be disabled (EFR bits 0-3 must be set to
a logic 0).
EFR BIT-6:
Automatic RTS is used for hardware flow control by
enabling EFR bit-6. The user must assert RTS# to
initiate this function. When AUTO RTS is selected, an
interrupt will be generated when the receive FIFO is
filled to the programmed RX trigger level and RTS# will
go to a logic 1 when it reaches the upper limit of the
hysteresis level. RTS# will return to a logic 0 when data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR16L2450 | 2.25V TO 5.5V DUART |
| XR16L2450IJ | 97-3108A20-29S-KIT |
| XR16L2450IM | 2.25V TO 5.5V DUART |
| XR16L2550IJ | LOW VOLTAGE DUART WITH 16-BYTE FIFO |
| XR16L2550IL | LOW VOLTAGE DUART WITH 16-BYTE FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C872CQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16C872IQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16L2450 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
| XR16L2450_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
| XR16L2450IJ | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
發(fā)布緊急采購，3分鐘左右您將得到回復。