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參數(shù)資料
| 型號： | XR16C872 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual UART with 1284 Parallel Port and Plug-and-Play（PnP） Controller(雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器）) |
| 中文描述： | 雙UART）與1284并行端口，插頭插即用（PnP）功能控制器（雙通用異步接收器/發(fā)送器（帶1284雙向并行端口和即插即用控制器） |
| 文件頁數(shù)： | 6/60頁 |
| 文件大?。?/td> | 314K |
| 代理商： | XR16C872 |
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XR16C872
6
Rev. P1.00
Preliminary
Symbol
Pin #
Type
Pin Description
IOCHRDY
20
OT24
Input/Output Channel Ready. IOCHRDY is a three-state active high output with
an internal weak pull-up resistor. This pin goes low when 1284 parallel port
requires additional clock during a read or write cycle.
TC
91
I
Terminal Count. TC is an active high input during DMA cycle and when
DACK# is low to indicate data transfer is complete.
RESET
1
I
System Reset. Reset is an active high input. A 40ns minimum pulse will reset
the internal registers and outputs to the default state. The TX output is at logic 1
and RX input is internally held at logic 1 during reset. See XR16C872 Reset
Conditions for details.
XTAL1
76
I
Crystal Oscillator Input. A 22.1184 MHz crystal must be connected to this input
and XTAL2 pin to form an internal oscillator circuit which provides the main
clock to the the baud rate generators. An external clock of same frequency
may be used instead.
XTAL2
75
O
Crystal Oscillator Output. The other side of the crystal is connected to this pin
to form an internal crystal oscillator.
EED
73
Bidir
EED is a bi-directional serial data bus to the external 93C46 EEPROM.
EECLK
72
O
EECLK is a 500KHz clock output to the external EEPROM for serial data timing
reference.
EECS
71
Bidir
EEPROM Chip Select. EECS is an active high output to the external EEPROM.
During Manual configuration mode, a logic 1 input will bypass the internal
divide-by-3 clock circuit to the two UARTs.
MAN#
74
I
Manual Configuration Select. MAN# is an active low input that enables S1-S5
for selection of COM1-4 and LPT1-2 or in embedded applications.
1284 CONTROLLER INTERFACE
PD7-PD0
32-34
37-41
IOP14
Parallel Data Bus. PD0-PD7 are three-state bi-directional data lines to the
parallel port. PD0 is the least significant bit with PD7 being the most
significant bit. PD0-PD7 are high current drive outputs and can connect to
the printer/parallel connector without external buffers.
ACK#
51
IP24
Acknowledge. ACK# is an active low input with with an internal weak pull-up.
It can be a general purpose input or line printer acknowledge signal. A logic
0 from the parallel/printer indicates successful data transfer to the print buffer.
AUTOFD#
46
IOP14
AutoLineFeed. AUTOFD# is an active low tri-state with an internal weak pull-
up. It can be a general purpose I/O or automatic line feed. When this signal
is low the printer should automatically line feed after each printed line.
PIN DESCRIPTION (CONT'D)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR16L2450 | 2.25V TO 5.5V DUART |
| XR16L2450IJ | 97-3108A20-29S-KIT |
| XR16L2450IM | 2.25V TO 5.5V DUART |
| XR16L2550IJ | LOW VOLTAGE DUART WITH 16-BYTE FIFO |
| XR16L2550IL | LOW VOLTAGE DUART WITH 16-BYTE FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16C872CQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16C872IQ | 制造商:EXAR 制造商全稱:EXAR 功能描述:DUAL UART WITH 1284 PARALLEL PORT AND PLUG-AND-PLAY CONTROLLER |
| XR16L2450 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
| XR16L2450_05 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
| XR16L2450IJ | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART |
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