
XRT7234
E3 UNI FOR ATM
x r
PRELIMINARY
REV. P1.0.0
50
Bit 7—LOC Rx
This “Read-Only” bit-field indicates whether or not the UNI is currently experiencing a “Loss of RxLineClk signal”
event. This UNI will set this bit-field to “1” if it is currently experiencing a “Loss of RxLineClk signal” event. Conversely,
the UNI will clear this bit-field (to “0”) if it detects the presence of the RxLineClk signal.
Bit 6—LOC Tx
This “Read-Only” bit-field indicates whether or not the UNI is currently experiencing a “Loss of TxInClk signal”
event. This UNI will set this bit-field to “1” if it is currently experiencing a “Loss of TxInClk signal” event. Conversely, the
UNI will clear this bit-field (to “0”) if it detects the presence of the TxInClk signal.
Bit 5—Int En Reset (Automatic Reset of Interrupt Enable Bits) Select
This “Read/Write” bit-field allows the user to configure the UNI to automatically clear the “Interrupt Enable” bit of an
‘a(chǎn)ctivated’ interrupt, during the Interrupt Service Routine. If the user selects this option, then an interrupt will be
automatically disabled following its activation. The user must go back and write to the appropriate register(s) in
order to enable the interrupt once again. This option is useful in preventing a recursively occurring interrupt from “tying
up the system” and loading down the local
μ
C/
μ
P
.
Writing a ‘1’ to this bit-field configures the UNI to automatically disable interrupts, following their activation. Writing
a ‘0’ to this bit-field configures the UNI to leave the Interrupt Enable bits enabled, following interrupt activation.
Bit 4—AMI/HDB3* (Line Code)
This “Read/Write” bit-field allows the user to specify whether the E3 line code should be in the AMI (Alternate Mark
Inversion) or HDB3 (Bipolar, with 4 Zero Substitution) format.
Writing a “1” to this bit-field configures the line code (of the Transmit and Receive E3 Framers) to be AMI. Writing a “0”
to this bit-field, configures the line code (of the Transmit and Receive E3 Framers) to be HDB3. For more information into
the AMI and HDB3 format, please see Sections 6.3.3.7.1.2.1 and 6.3.3.7.1.2.2.
Note:
This bit-field is ignored if Bit 3 is “1”.
Bit 3—Unipolar/Bipolar* (Line Code)
This “Read/Write” bit-field allows the user to configure the Transmit and Receive E3 Framers to transmit/receive data
in a Unipolar (Single-Rail) or in a Bipolar (Dual-Rail) format.
If the user selects the “Bipolar” format, then he/she can manipulate Bit 4 (of this register) in order to select either the
AMI or HDB3 line code.
Writing a “0” to this bit-field configures the Transmit E3 Framer to transmit data in a bipolar (dual-rail) format; and
the Receive E3 Framer to receive data from the “l(fā)ine” in a bipolar (dual-rail) format. Writing a “1” to this bit-field configures
the Transmit E3 Framer to transmit data to the line, in a unipolar (single-rail) format, and the Receive E3 Framer to
receive data from the “l(fā)ine” in a unipolar format.
For more information on Unipolar and Bipolar formats, please see Sections 6.3.3.7.1.1 and 6.3.3.7.1.2.
Bit 2—TxLineClk Inv
This “Read/Write” bit-field allows the user to configure the Transmit E3 Framer to update the outbound E3 data on the
TxPOS and TxNEG output pins, on either the rising or the falling edge of TxLineClk.
Writing a “0” to this bit-field configures the Transmit E3 Framer to update TxPOS and TxNEG on the rising edge of
TxLineClk.
Writing a “1” to this bit-field configures the Transmit E3 Framer to update TxPOS and TxNEG on the falling edge of
TxLineClk.
For more information on this feature, please see Section 6.3.3.7.2.