
x r
PRELIMINAZRY
E3 UNI FOR ATM
XRT7234
REV. P1.0.0
53
Bit 0—Rx Utopia Interrupt Enable
This “Read/Write” bit-field allows the user to globally disable all “Receive Utopia Interface block” interrupts; or to
enables those interrupts that have been enabled via the “Rx Utopia Interrupt Enable/Status” Register (Address = 7Dh).
Writing a “0” to this bit-field disables ALL “Receive Utopia Interface block” interrupts (independent of the enable/
disable status of these interrupts within the “Rx Utopia Interrupt Enable/Status” Register). Writing a “1” to this bit-
field enables those “Receive Utopia Interface block” interrupts that have already been enabled via the “Rx Utopia
Interrupt Enable/Status” register.
3.3.2.6 UNI Interrupt Status Register
Bit 6—One Second Interrupt Status
This “Reset-upon-Read” bit-field indicates whether or not the “One Second” interrupt has occurred, since the last
read of this register.
If this bit-field is “0”, then a “One Second” interrupt has not occurred.
However, if this bit-field is “1”, then the “One Second” interrupt has occurred.
Bit 5— Tx E3 (Framer) Interrupt Status
This “Read-Only” bit-field indicates whether or not a “Transmit E3 Framer block” interrupt request is pending.
If this bit-field is “0”, then no “Transmit E3 Framer block” interrupt request is pending.
However, if this bit-field is “1”, then a “Transmit E3 Framer” block interrupt request is pending and awaiting service.
Since the Transmit E3 Framer has one potential interrupt (LAPD Message Transfer Complete), the user should include
a read to the Tx E3 LAPD Status/Interrupt Register (Address = 3Fh), during the Interrupt Service Routine, in order to
properly service this interrupt.
This bit-field will be cleared (set to “0”) after the local
μ
P
has read the “Tx E3 LAPD Status/Interrupt” register.
Bit 4—Rx E3 (Framer) Interrupt Status
This “Read-Only” bit field indicates whether or not a “Receive E3 Framer block” interrupt request is pending.
If this bit-field is “0”, then no “Receive E3 Framer block” interrupt request is pending.
However, if this bit-field is “1” then a “Receive E3 Framer block” interrupt request is pending and awaiting service. Since
the Receive E3 Framer has several “potential” interrupt sources, the user should include reads to the following reg-
Address = 05h, UNI Interrupt Status Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
One Sec
Interrupt
Status
Tx E3
Framer
Interrupt
Enable
Rx E3
Framer
Interrupt
Enable
Tx CP
Interrupt
Enable
Rx CP
Interrupt
Enable
Tx Utopia
Interrupt
Enable
Rx Utopia
Interrupt
Enable
RO
RUR
RO
RO
RO
RO
RO
RO
0
0
0
0
0
0
0
0