參數(shù)資料
型號: XRT72L74
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 10/104頁
文件大小: 1301K
代理商: XRT72L74
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.0
á
PRELIMINARY
10
Microprocessor interface supports 8 bit wide or 16-
bit wide read/write accesses.
Supports polled or interrupt-driven environments.
Supports burst mode “Read and Write” operations
between the “l(fā)ocal” microprocessor and the UNI on-
chip registers and RAM locations.
Includes a “Loss of Clock Signal” protection feature
that terminates “Read/Write” cycles with the local
μ
P during a “Loss of Clock signal” event.
P
ERFORMANCE
M
ONITOR
S
ECTION
Contains numerous on-chip “Read-Only” registers
that allows the user to monitor the overall “health” of
the system.
T
EST
AND
D
IAGNOSTIC
S
ECTION
Supports Line, PLCP and Cell Loop-back Modes
Supports Line-Side Testing
Contains an on-chip Test Cell Generator and an on-
chip Test Cell Receiver
Test Cell Generator can generate a “continuous”
stream of test cells, or a “one-shot” burst of 1024
test cells.
The Test Cell Receiver identifies, collects and eval-
uates Test Cells for errors.
The Test Cell Receiver also reports the occurrence
of errors to the user.
L
INE
I
NTERFACE
D
RIVE
AND
S
CAN
S
ECTION
Consists of an on-chip “Read/Write” register that
allows the user to control the state of 6 output pins.
Consists of an on-chip “Read-Only” register that al-
lows the user to monitor the state of 3 input pins.
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