參數(shù)資料
型號(hào)： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 71/104頁
文件大?。?/td> 1301K
代理商： XRT72L74
á
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
71
T
ABLE
46:
PMON PLCP FEBE C
OUNT
R
EGISTER
-LSB
R
EGISTER
45 PMON PLCP FEBE C
OUNT
R
EGISTER
-LSB H
EX
A
DDRESS
: 0
X
2D
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
PLCP FEBE Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON PLCP FEBE Count
Register - MSB” contains the 16 bit value for the total number of PLCP FEBE
(Far-End Block Error) events that have been detected since the last read of
this register. This register contains the “Low” byte value of this 16-bit expres-
sion.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in both the “ATM UNI” and “PLCP” Modes.
T
ABLE
47:
PMON S
INGLE
-
BIT
HEC E
RROR
C
OUNT
- MSB
R
EGISTER
46 PMON S
INGLE
-
BIT
HEC E
RROR
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
2E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
S-HEC Error Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Single-Bit HEC Error
Count Register - LSB” contains the 16 bit value for the total number of Sin-
gle-bit HEC byte errors that have been detected since the last read of this
register. This register contains the “High” byte value of this 16-bit expres-
sion.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
48:
PMON S
INGLE
-
BIT
HEC E
RROR
C
OUNT
- LSB
R
EGISTER
47 PMON S
INGLE
-
BIT
HEC E
RROR
C
OUNT
- LSB H
EX
A
DDRESS
: 0
X
2F
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
S-HEC Error Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Single-Bit HEC Error
Count Register - MSB” contains the 16 bit value for the total number of Sin-
gle-bit HEC byte errors that have been detected since the last read of this
register. This register contains the “Low” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
49:
PMON M
ULTIPLE
-
BIT
HEC E
RROR
C
OUNT
- MSB
R
EGISTER
48 PMON M
ULTIPLE
-
BIT
HEC E
RROR
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
30
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
M-HEC Error Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON Multiple-Bit HEC Error
Count Register - LSB” contains the 16 bit value for the total number of Multi-
bit HEC byte errors that have been detected since the last read of this regis-
ter. This register contains the “High” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74has been configured to
operate in the “ATM UNI” Mode.
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