參數(shù)資料
型號： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 32/104頁
文件大?。?/td> 1301K
代理商： XRT72L74
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.0
á
PRELIMINARY
32
AF26
AC26
AB25
AA24
AE26
AD25
AC24
AB23
AE24
AD23
AF24
AE22
AC22
AF22
AE20
AD21
RxUData0
RxUData1
RxUData2
RxUData3
RxUData4
RxUData5
RxUData6
RxUData7
RxUData8
RxUData9
RxUData10
RxUData11
RxUData12
RxUData13
RxUData14
RxUData15
O
Receive UTOPIA Data Bus Output:
These output pins function as the Receive UTOPIA Data Bus. ATM cell data that
has been received from the “Remote Terminal Equipment” is output on the
Receive UTOPIA Data Bus, where it can be read and processed by the ATM Layer
Processor.
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
AC18
RxUEn
I
Receive UTOPIA Interface—Output Enable:
This active-”Low” input signal is used to control the drivers of the Receive UTOPIA
Data Bus. When this signal is “High” (negated) then the Receive UTOPIA Data
Bus is tri-stated. When this signal is asserted, then the contents of the byte or
word that is at the “front of the RxFIFO” will be “popped” and placed on the
Receive UTOPIA Data bus on the very next rising edge of RxUClk.
N
OTE
:
The user should tie this pin to “GND” whenever the XRT72L74 has been
configured to operate in the “Clear-Channel-Framer” Mode.
AE23
RxUPrty
O
Receive UTOPIA Interface—Parity Output pin:
The Receive UTOPIA interface block will compute the odd-parity of each byte (or
word) that will place in the Receive UTOPIA Data Bus. This odd-parity value will be
output on this pin, while the corresponding byte (or word) is present on the Receive
UTOPIA Data Bus.
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
AD18
RxUSoC
O
Receive UTOPIA Interface—Start of Cell Indicator:
This output pin allows the ATM Layer Processor to determine the boundaries or
the ATM cells that are output via the Receive UTOPIA Data bus. The Receive
UTOPIA Interface block will assert this signal when the first byte (or word) of a new
cell is present on the Receive UTOPIA Data Bus; RxUData[15:0].
N
OTE
:
This output pin is only active if the XRT72L74 has been configured to oper-
ate in the “ATM UNI” Mode.
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT7300IV E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L02M TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02MIV TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT72L74IB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
XRT7300 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300ES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT7300IV 功能描述:外圍驅(qū)動器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT7300IV-F 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*