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    參數(shù)資料
    型號(hào): XRT73L02
    廠商: Exar Corporation
    英文描述: 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
    中文描述: 2頻道E3/DS3/STS-1線路接口單元(2通道E3/DS3/STS-1線接口單元)
    文件頁(yè)數(shù): 4/62頁(yè)
    文件大小: 716K
    代理商: XRT73L02
    XRT73L02
    2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
    REV. P1.1.0
    á
    PRELIMINARY
    II
    Figure 10.An Example of B3ZS Encoding ...................................................................................................... 28
    HDB3 Encoding .................................................................................................................................. 28
    Figure 11.An Example of HDB3 Encoding ...................................................................................................... 28
    Disabling the HDB3/B3ZS Encoder ................................................................................................... 28
    COMMAND REGISTER CR2-(N) ..................................................................................................... 29
    2.4 T
    HE
    T
    RANSMIT
    P
    ULSE
    S
    HAPING
    C
    IRCUITRY
    .................................................................................... 29
    Figure 12.The Bellcore GR-499-CORE Transmit Output Pulse Template for DS3 Applications .................... 29
    Figure 13.The Bellcore GR-253-CORE Transmit Output Pulse Template for SONET STS-1 Applications .... 30
    Enabling the Transmit Line Build-Out Circuit ..................................................................................... 30
    COMMAND REGISTER CR1-(N) ..................................................................................................... 30
    Disabling the Transmit Line Build-Out Circuit .................................................................................... 30
    COMMAND REGISTER CR1-(N) ..................................................................................................... 31
    Design Guideline for Setting the Transmit Line Build-Out Circuit ...................................................... 31
    The Transmit Line Build-Out Circuit and E3 Applications .................................................................. 31
    2.5 I
    NTERFACING
    THE
    T
    RANSMIT
    S
    ECTIONS
    OF
    THE
    XRT73L02
    TO
    THE
    L
    INE
    ......................................... 31
    Figure 14.Recommended Schematic for Interfacing the Transmit Section of the XRT73L02 to the Line ....... 31
    TRANSFORMER VENDOR INFORMATION ........................................................................................... 32
    3.0 THE RECEIVE SECTION ................................................................................................................... 32
    3.1 I
    NTERFACING
    THE
    R
    ECEIVE
    S
    ECTIONS
    OF
    THE
    XRT73L02
    TO
    THE
    L
    INE
    ........................................... 32
    Figure 15.Recommended Schematic for Transformer-Coupling the Receive Section of the XRT73L02 to the
    Line ................................................................................................................................................... 33
    Figure 16.Recommended Schematic for Capacitive-Coupling the Receive Section of the XRT73L02 to the Line
    33
    3.2 T
    HE
    R
    ECEIVE
    E
    QUALIZER
    B
    LOCK
    .................................................................................................... 34
    Figure 17.The Typical Application for the System Installer ............................................................................. 34
    COMMAND REGISTER CR2_(N) ..................................................................................................... 35
    3.3 P
    EAK
    D
    ETECTOR
    AND
    S
    LICER
    ......................................................................................................... 35
    3.4 C
    LOCK
    R
    ECOVERY
    PLL .................................................................................................................. 35
    The Training Mode ............................................................................................................................. 35
    The Data/Clock Recovery Mode ........................................................................................................ 35
    3.5 T
    HE
    HDB3/B3ZS D
    ECODER
    .......................................................................................................... 35
    B3ZS Decoding DS3/STS-1 Applications .......................................................................................... 35
    Figure 18.An Example of B3ZS Decoding ...................................................................................................... 36
    HDB3 Decoding E3 Applications ........................................................................................................ 36
    Figure 19.An Example of HDB3 Decoding ...................................................................................................... 36
    Configuring the HDB3/B3ZS Decoder ................................................................................................ 36
    COMMAND REGISTER CR2-(N) ..................................................................................................... 37
    3.6 LOS D
    ECLARATION
    /C
    LEARANCE
    ..................................................................................................... 37
    The LOS Declaration/Clearance Criteria for E3 Applications ............................................................. 37
    Figure 20.The Signal Levels at which the XRT73L02 declares and clears LOS ............................................. 38
    Figure 21.The Behavior the LOS Output Indicator in response to the Loss of Signal and the Restoration of Signal
    38
    The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications ........................................ 39
    Table 5:The ALOS (Analog LOS) Declaration and Clearance Thresholds for a given setting of LOSTHR and
    REQEN for DS3 and STS-1 Applications ........................................................................................... 39
    相關(guān)PDF資料
    PDF描述
    XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    XRT73L04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    XRT73L02M 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
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    XRT73L02MIV 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
    XRT73L02MIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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