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參數(shù)資料
| 型號： | XRT73L04 |
| 廠商： | Exar Corporation |
| 英文描述： | 4 Channel E3/DS3/STS-1 Line Interface Unit(4通道 E3/DS3/STS-1線接口單元) |
| 中文描述： | 4頻道E3/DS3/STS-1線路接口單元（4通道E3/DS3/STS-1線接口單元） |
| 文件頁數(shù)： | 42/62頁 |
| 文件大小： | 781K |
| 代理商： | XRT73L04 |
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XRT73L04
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. P1.0.5
á
PRELIMINARY
38
b. Operating in the Hardware Mode
To globally enable all HDB3/B3ZS Decoder blocks,
pull the
CS/(SR/DR)_(n)
input pin "Low". To globally
disable all HDB3/B3ZS Decoder blocks and configure
the device to transmit and receive in an AMI format by
pulling the CS/
(SR/DR)_(n)
input pin "High".
3.5
LOS D
ECLARATION
/C
LEARANCE
Each channel contains circuitry that monitors the fol-
lowing two parameters associated with the incoming
line signals.
1.
The amplitude of the incoming line signal via the
RTIP and RRing inputs.
2.
The number of pulses detected in the incoming
line signal within a certain amount of time.
If a given channel determines that the incoming line
signal is missing either due to insufficient amplitude
or a lack of pulses in the incoming line signal, then it
declares a Loss of Signal (LOS) condition. The chan-
nel declares the LOS condition by toggling its respec-
tive RLOS(n) output pin “High" and by setting its cor-
responding RLOS(n) bit field within Command Regis-
ter 0 (or Command Register 8) to "1".
Conversely, if the channel determines that the incom-
ing line signal has been restored (e.g., there is suffi-
cient amplitude and pulses in the incoming line sig-
nal), then it clears the LOS condition by toggling its
respective RLOS(n) output pin “Low" and setting its
corresponding RLOS(n) bit-field to "0".
In general, the LOS Declaration/Clearance scheme
that is employed in the XRT73L04 is based upon ITU-
T Recommendation G.775 for both E3 and DS3 appli-
cations.
3.5.1
The LOS Declaration/Clearance Criteria
for E3 Applications
When the XRT73L04 is operating in the E3 Mode, a
given channel declares an LOS Condition if its re-
ceive line signal amplitude drops to -35dB or below.
Further, the channel clears the LOS Condition if its
receive line signal amplitude rises back to -15dB or
above. Figure 24 illustrates the signal levels at which
each channel of the XRT73L04 declares and clears
LOS.
COMMAND REGISTER CR3-(N)
D4
D3
D2
D1
D0
(SR/DR)_(n)
LOSMUT(n)
RxOFF
RxClk(n)INV
Reserved
0
X
X
X
X
F
IGURE
24. T
HE
S
IGNAL
L
EVELS
THAT
THE
XRT73L04
DECLARES
AND
CLEARS
LOS
0 dB
-12 dB
-15dB
-35dB
Maximum Cable Loss for E3
LOS Signal Must be Declared
LOS Signal Must be Cleared
LOS Signal may be Cleared or Declared
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73L06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00AIV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04B | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04BES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L04BIV | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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