á
XRT73L04
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
PRELIMINARY
REV. P1.0.5
5
32
TRing0
O
Transmit Ring Output - Channel 0:
The XRT73L04 uses this pin along with TTIP0 to transmit a bipolar line
signal via a 1:1 transformer.
33
TxAVDD0
****
Transmitter Analog Supply, 3.3V + 5% - Channel(n)
34
TTIP0
O
Transmit TTIP Output - Channel 0:
The XRT73L04 uses this pin along with TRing0 to transmit a bipolar line
signal via a 1:1 transformer.
35
MTIP0
I
Monitor Tip Input - Channel 0:
The bipolar line output signal from TTIP0 can be connected to this pin
via a 270-ohm resistor in order to check for line driver failure. This pin is
internally pulled "High".
36
MRing0
I
Monitor Ring Input - Channel 0:
The bipolar line output signal from TRing0 can be connected to this pin
via a 270-ohm resistor in order to check for line driver failure. This pin is
internally pulled "High".
37
NC
No connection
38
NC
No connection
39
NC
No connection
40
TNData0
I
Transmit Negative Data Input - Channel 0:
The XRT73L04 samples this pin on the falling edge of TxClk0. If the
device samples a "1", then it generates and transmits a negative polarity
pulse to the line.
In Single-Rail Mode, this pin must be tied to GND to enable the HDB3/
B3ZS Encoder and Decoder, (internally pulled-down).
In Dual-Rail Mode this input is the N-Rail Data input.
N
OTE
:
If the XRT73L04 is operating in the HOST Mode, then the
XRT73L04 can be configured to sample the TNData0 pin on either the
rising or falling edge of TxClk0.
41
TPData0
I
Transmit Positive Data Input - Channel 0
:
The XRT73L04 samples this pin on the falling edge of TxClk. If the
device samples a "1", then it generates and transmits a positive polarity
pulse to the line.
The data should be applied to this input pin if the Transmit Section is
configured to accept Single-Rail data from the Terminal Equipment.
N
OTE
:
If the XRT73L04 is operating in the HOST Mode, then the
XRT73L04 can be configured to sample the TPData0 pin on either the
rising or falling edge of TxClk0.
42
TxClk0
I
Transmit Clock Input for TPData and TNData - Channel 0:
This input pin must be driven at 34.368 MHz (for E3 applications),
44.736 MHz (for DS3 applications), or 51.84 MHz (for SONET STS-1
applications). The XRT73L04 uses this signal to sample the TPData0
and TNData0 input pins. By default, the XRT73L04 is configured to sam-
ple these two pins on the falling edge of this signal.
N
OTE
:
If the XRT73L04 is operating in the HOST Mode, then the device
can be configured to sample the TPData0 and TNData0 input pins on
either the rising or falling edge of TxClk0.
43
TxLEV1
I
See description of pin 44, TxLEV0
PIN #
NAME
TYPE
DESCRIPTION