XRT79L71
REV. P1.0.3
PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
á
10
C11
TxOH/
TxHDLCDat_5
I
Transmit Overhead Data Input/Transmit HDLC Controller Data Bit 5 input
pin:
The function of This input pin depends upon whether or not the XRT79L71 has
been configured to operate in the High-Speed HDLC Controller Mode.
Non-High Speed HDLC Controller Mode - TxOH:
The Transmit Overhead Data Input Interface accepts overhead via this input pin,
and insert this data into the overhead bit positions within the outbound DS3 or E3
frames. If the TxOHIns input pin is pulled "High", then the Transmit Overhead
Data Input Interface will sample the overhead data, via this input pin, upon the
falling edge of the TxOHClk output signal.
Conversely, if the TxOHIns input pin is NOT pulled "High", then the Transmit
Overhead Data Input Interface block will be inactive and will not accept any over-
head data via the TxOH input pin.
High Speed HDLC Controller Mode - TxHDLCDat_5:
If the XRT79L71 is configured to operate in the High-Speed HDLC Controller
mode, then the local terminal equipment will be provided with a byte-wide Trans-
mit HDLC Controller byte-wide input interface. This input pin will function as Bit 5
within this byte wide interface.
Data, residing on the Transmit HDLC Controller byte wide input interface, will be
sampled upon the rising edge of the TxHDLCClk output signal.
D10
TxOHIns/
TxHDLCDat_4
I
Transmit Overhead Data Insert Input/Transmit HDLC Controller Data Bit 4
input pin:
The function of this input pin depends upon whether or not the XRT79L71 has
been configured to operate in the High-Speed HDLC Controller Mode.
Non-High Speed HDLC Controller Mode - TxOHIns:
This input pin is used to either enable or disable the Transmit Overhead Data
Input Interface block. If the Transmit Overhead Data Input Interface block is
enabled, then it will accept overhead data from the local terminal equipment via
the TxOH input pin; and insert this data into the overhead bit positions within the
outbound DS3 or E3 data stream.
Conversely, if the Transmit Overhead Data Input Interface block is disabled, then
it will NOT accept overhead data from the local terminal equipment.Pulling this
input pin "High" enables the Transmit Overhead Data Input Interface block. Pull-
ing this input pin "Low" disables the Transmit Overhead Data Input Interface
block.
High-Speed HDLC Controller Mode - TxHDLCDat_4:
If the XRT79L71 is configured to operate in the High-Speed HDLC Controller
mode, then the local terminal equipment will be provided with a byte-wide Trans-
mit HDLC Controller byte-wide input interface. This input pin will function as Bit 4
within this byte wide interface.
Data, residing on the Transmit HDLC Controller byte wide input interface, will be
sampled upon the rising edge of the TxHDLCClk output signal.
B12
TxOHClk
O
Transmit Overhead Clock Output:
This output pin functions as the Transmit Overhead Data Input Interface clock
signal. If the user enables the Transmit Overhead Data Input Interface block by
asserting the TxOHIns input pin, then the Transmit Overhead Data Input Inter-
face block will sample and latch the data residing on the TxOH input pin upon the
falling edge of this signal.
N
OTE
:
The Transmit Overhead Data Input Interface block is disabled if the user
has configured the XRT79L71 to operate in the High-Speed HDLC
Controller Mode.
P
IN
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AME
TYPE
D
ESCRIPTION