XRT79L71
REV. P1.0.3
PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
á
20
N3
TxUClav/
TxPPA
O
Transmit UTOPIA Interface - Cell Available Output Pin/Transmit POS-PHY
Interface - Packet Data Available Output pin:
The function of this output pin depends upon whether the XRT79L71 has been
configured to operate in the ATM UNI or PPP Mode.
ATM UNI Mode - TxUClav:
This output pin supports data flow control between the ATM Layer processor and
the Transmit UTOPIA Interface block. This signal is asserted (toggles "High")
when the TxFIFO is capable of receiving at least one more full cell of data from
the ATM Layer processor. This signal is negated, if the TxFIFO is not capable of
receiving one more full cell of data from the ATM Layer processor.
Multi-PHY Operation:
When the UNI chip is operating in the Multi-PHY mode, this signal will be tri-
stated until the TxUClk cycle following the assertion of a valid address on the
Transmit UTOPIA Address bus input pins (e.g., when the contents on the Trans-
mit UTOPIA Address bus pins match that within the Transmit UTOPIA Address
Register. Afterwards, this output pin will behave in accordance with the cell-level
handshake mode.
PPP Mode - TxPPA:
The XRT79L71 will drive this output pin "High" whenever a programmable num-
ber of bytes of empty space is available for writing more packet data into the
TxFIFO.
P3
TxUSoC/
TxPSoP
I
Transmit UTOPIA - Start of Cell Input/Transmit POS-PHY - Start of Packet
Input:
The function of this input signal depends upon whether the XRT79L71 has been
configured to operate in the ATM UNI or in the PPP Mode.
ATM UNI Mode Operation - TxUSoC:
This input pin is driven by the ATM Layer Processor and is used to indicate the
start of an ATM cell that is being transmitted from the ATM Layer Processor. This
input pin must be pulsed "High" whenever the first byte (or word) of a new cell is
present on the Transmit UTOPIA Data Bus (TxUData[15:0]). This input pin must
remain "Low" at all other times.
PPP Mode Operation - TxPSoP/TxPSoC:
If the XRT79L71 has been configured to operate in the Packet-Mode, then this
input pin is pulsed "High" to denote that the first byte (or word) of a given packet
is placed on the TxPData[15:0] input pins.If the XRT79L71 has been configured
to operate in the Cell-Chunk Mode, then this input pin is pulsed "High" to denote
that the first byte of a packet chunk, if placed on the TxPData[15:0] input pins.
N
OTE
:
This input pin is only valid if the XRT79L71 has been configured to
operate in the PPP Mode.
P
IN
#
N
AME
TYPE
D
ESCRIPTION