XRT79L71
REV. P1.0.3
PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
á
242
THE RECEIVE ATM CELL PROCESSOR BLOCK
This section presents the Register Description/Address Map of the control registers associated with the
Receive ATM Cell Processor block.
T
ABLE
17: R
ECEIVE
ATM C
ELL
P
ROCESSOR
/PPP P
ROCESSOR
B
LOCK
- R
EGISTER
/A
DDRESS
M
AP
A
DDRESS
L
OCATION
R
EGISTER
N
AME
T
YPE
D
EFAULT
V
ALUE
R
ECEIVE
ATM C
ELL
P
ROCESSOR
/PPP P
ROCESSOR
B
LOCK
C
ONTROL
R
EGISTERS
0x1700
Receive ATM Control - Receive ATM Control Register - Byte 3
R/W
0x00
0x1701
Receive ATM Control - Receive ATM Control Register - Byte 2
R/W
0x00
0x1702
Receive ATM Control - Receive ATM Control Register - Byte 1
R/W
0x00
0x1703
Receive ATM Cell/PPP Control - Receive ATM Control Register - Byte 0
R/W
0x00
0x1704 - 0x1706
Reserved
R/O
0x00
0x1707
Receive ATM Status Register- -1
R/O
0x00
0x1708 - 0x1709
Reserved
R/O
0x00
0x170A
Receive ATM Interrupt Status Register - Byte 1
RUR
0x00
0x170B
Receive ATM Cell/PPP Processor Interrupt Status Register - Byte 0
RUR
0x00
0x170C - 0x170D
Reserved
R/O
0x00
0x170E
Receive ATM Cell Processor Block Interrupt Enable Register - Byte 1
R/W
0x00
0x170F
Receive ATM Cell/PPP Processor Block Interrupt Enable Register - Byte
0
R/W
0x00
0x1710
Receive PPP Processor - Receive Good PPP Packet Count Register -
Byte 3
RUR
0x00
0x1711
Receive PPP Processor - Receive Good PPP Packet Count Register -
Byte 2
RUR
0x00
0x1712
Receive PPP Processor - Receive Good PPP Packet Count Register -
Byte 1
RUR
0x00
0x1713
Receive ATM Cell Insertion/Extraction Memory Control Register Receive
PPP Processor - Receive Good PPP Packet Count Register - Byte 0
R/W or
RUR
0x00
0x1714
Receive ATM Cell Insertion/Extraction Memory Data Register - Byte 3
Receive PPP Processor - Receive FCS Error Count Register - Byte 3
R/W or
RUR
0x00
0x1715
Receive ATM Cell Insertion/Extraction Memory Data Register - Byte 2
Receive PPP Processor - Receive FCS Error Count Register - Byte 2
R/W or
RUR
0x00
0x1716
Receive ATM Cell Insertion/Extraction Memory Data Register - Byte 1
Receive PPP Processor - Receive FCS Error Count Register - Byte 1
R/W or
RUR
0x00
0x1717
Receive ATM Cell Insertion/Extraction Memory Data Register - Byte 0
Receive PPP Processor - Receive FCS Error Count Register - Byte 0
R/W or
RUR
0x00
0x1718
Receive ATM Programmable User Defined Field Register - Byte 3
Receive PPP Processor - Receive ABORT Count Register - Byte 3
R/W or
RUR
0x00
0x1719
Receive ATM Programmable User Defined Field Register - Byte 2
Receive PPP Processor - Receive ABORT Count Register - Byte 2
R/W or
RUR
0x00