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XRT79L71
PRELIMINARY
241
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
TABLE 31: LIST AND DESCRIPTION OF THE PINS ASSOCIATED WITH THE RECEIVE OVERHEAD DATA OUTPUT
INTERFACE BLOCK
SIGNAL NAME
PIN/BALL #
TYPE
DESCRIPTION
RxOH
C7
O
Receive Overhead Data Output Interface block - Data Output pin:
The method to sample this output pin depends upon whether using Method 1
from the Receive Overhead Data Output Interface block, as described below
and in the following sections.
If Method 1 is used:
The XRT79L71 outputs the overhead bits, within the incoming DS3 data-
stream, via this output pin. The Receive Overhead Data Output Interface block
will output a given bit, upon the falling edge of RxOHClk. Hence, the System-
Side Terminal Equipment should be designed or configured to sample the data,
at this pin, upon the rising edge of RxOHClk.
If Method 2 is used:
The XRT79L71 outputs the overhead bits, within the incoming DS3 data-
stream, via this output pin. The Receive Overhead Data Output Interface block
will assert the RxOHEnable output pin for one RxClk period whenever the data,
residing on the RxOH output pin has become stable and is safe for sampling.
In this case, the user should design or configure the System-Side Terminal
Equipment to sample and latch the RxOH data upon the falling edge of RxClk
coincident to whenever the RxOHEnable output pin is sampled "High".
The XRT79L71 will always output the DS3 overhead bits via this output pin.
There are no external input pins or register bits settings available that will dis-
able this output pin.
RxOHClk
A7
O
Receive Overhead Data Output Interface block - Clock Output pin:
This particular output pin is only used if Method 1 is employed to extract over-
head data from the Receive Overhead Data Output Interface port (see
Section4.3.5.1 below). The XRT79L71 will output the overhead bits within the incom-
ing DS3 data-stream, via the RxOH output pin, upon the falling edge of this par-
ticular clock signal. As a consequence, the System-Side Terminal Equipment
should be designed or configured to sample the data, at this pin, upon the rising
edge of RxOHClk.
NOTE: This output clock signal is always active.