![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_100.png)
XRT79L71
PRELIMINARY
85
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
4.2.1.5
Mode 5 - Nibble-Parallel/Local-Timing/Frame Slave Mode Operation for the Transmit
Payload Data Input Interface Block
If the XRT79L71 is configured to operate in Mode 5 then all of the following is true.
The XRT79L71 will be configured to operate in the Local-Timing Mode. In other words, the Transmit Section
of the XRT79L71 will use the TxInClk input signal as its timing source.
In this mode, the XRT79L71 will use the TxInClk signal to derive the TxNibClk signal.
For DS3 Applications, the TxNibClk frequency is approximately one-fourth of the TxInClk clock input signal
or 11.184MHz. The reason for the TxNibClk frequency not being exactly 11.184MHz will be explained later
in this section.
Since the XRT79L71 is configured to operate in the Nibble-Parallel Mode, it will sample and latch the data,
being applied to the TxNib[3:0] input pins upon the third rising edge of the TxInClk input clock signal,
following a given rising edge of the TxNibClk output clock signal.
The Transmit Section of the XRT79L71 will initiate the generation and transmission of a new DS3 frame
anytime it detects a rising edge in the TxFrameRef input pin.
The XRT79L71 will pulse the TxNibFrame output pin "High" for one nibble-period coincident to whenever the
Transmit Payload Data Input Interface is processing the very last nibble within a given DS3 frame.
Figure 38 presents an illustration of how to interface the System-Side Terminal Equipment to the Transmit
Payload Data Input Interface block of the XRT79L71 for Mode 5 operation.
Mode 5 Operation of the Transmit Payload Data Input Interface Block
Whenever the XRT79L71 has been configured to operate in this mode, it will function as the source of a Nibble
Clock signal via the TxNibClk output signal.
NOTE: For "Mode 5" Operation, the "TxNibClk" output signal is ultimately derived from the "TxInClk" input signal.
The System-Side Terminal Equipment should output the payload data that is to be transported via the
outbound DS3 data-stream, in a Nibble-Parallel manner via its DS3_Data_Out[3:0] output pins. The user is
FIGURE 38. AN ILLUSTRATION OF HOW TO INTERFACE THE SYSTEM-SIDE TERMINAL EQUIPMENT SIGNALS FOR MODE
5 (NIBBLE-PARALLEL/LOCAL-TIMING/FRAME-SLAVE) MODE OPERATION
System-Side Terminal
Equipment
XRT79L71 DS3/E3
Framer IC
DS3_Data_Out[3:0]
DS3_Nib_Clock_In
Tx_Start_of_Frame
TxNib[3:0]
TxNibClk
TxFrameRef
NibInt
VCC
4
44.736MHz Clock Source
TxInClk
Approximately 11.184MHz