參數(shù)資料
型號(hào)： μPD30181
廠商： NEC Corp.
英文描述： 64-Bit RISC Microprosessor(64位RISC微處理器)
中文描述： 64位RISC Microprosessor（64位的RISC微處理器）
文件頁(yè)數(shù)： 1/68頁(yè)
文件大?。?/td> 270K
代理商： ΜPD30181
1998
DATA SHEET
1998
MIPS Technologies Inc.
MOS INTEGRATED CIRCUIT
V
R
10000
TM
, V
R
12000
TM
64-BIT MICROPROCESSORS
μ
PD30700,30700L,30710
DESCRIPTION
The
μ
PD30700 and 30700L (V
R
10000) and
μ
PD30710 (V
R
12000) are new members of NEC’s V
R
series
TM
RISC
(Reduced Instruction Set Computer) microprocessors. These new high-performance 64-bit microprocessors employ
a new RISC architecture developed by MIPS
TM
, ANDES
TM
architecture.
The V
R
10000 and V
R
12000 are designed to be used in high-performance computers and achieve considerably
higher processing speed through the employment of a super scalar pipeline.
Remark
ANDES: Architecture with Non-sequential Dynamic Execution Scheduling
The functions of these microprocessors are described in detail in the following manuals. Be sure to read these
manuals when designing systems.
V
R
10000, V
R
12000 User’s Manual
V
R
5000
TM
, V
R
10000 User’s Manual - Instruction : U12754E
: U10278E
FEATURES
MIPS 64-bit RISC architecture
High-speed operation processing
Super scalar pipeline executing five instructions in parallel
<V
R
10000>
14SPECint95, 23SPECfp95
<V
R
12000>
17SPECint95, 27SPECfp95
Instruction set upward-compatible with V
R
4000
TM
,
V
R
4200
TM
, and V
R
4400
TM
(conforms to MIPS-I/II/III/IV)
High-speed translation lookaside buffer (TLB) (64 double
entries)
Address space Physical: 40 bits
Virtual: 44 bits
Floating-point unit (FPU)
Primary cache memory (32K bytes for each of instruction
and data, 2-way set associative)
Secondary cache memory interface
128-bit secondary cache interface
SSRAM interface (V
R
10000: 250 MHz MAX., V
R
12000:
200 MHz MAX.)
Supports up to 16M bytes
Operating frequency
<V
R
10000>
Internal: 250 MHz MAX.
External: 250 MHz MAX.
External/internal multiplication factor selectable from
1 to 4
<V
R
12000>
Internal: 300 MHz MAX.
External: 150 MHz MAX.
External/internal multiplication factor selectable from
2 to 10
Multi-processor function
Up to four buses of cluster connection can be connected.
Supply voltage
<V
R
10000>
V
DD
= 3.3 V
±
0.165 V (
μ
PD30700)
V
DD
= 2.6 V
±
0.1 V (
μ
PD30700L)
<V
R
12000>
V
DD
= 2.6 V
±
0.1 V (
μ
PD30710)
Unless otherwise specified, the V
R
10000 is treated as the representative model throughout this document.
The information in this document is subject to change without notice.
Date No. U12703EJ1V0DS00 (1st edition)
Date Published June 1998 N CP(K)
Printed in Japan
相關(guān)PDF資料
PDF描述
μPD30210 64-Bit MIPS RISC Microprocessor(64位MIPS RISC 微處理器)
μPD30200 High-Performance, 64-Bit RISC Microprosessor(高性能64位RISC微處理器)
μPD30700L 64-Bit Microprocessor(64位RISC微處理器)
μPD30700 64-Bit Microprocessor(64位RISC微處理器)
μPD30710 64-Bit Microprocessor(64位RISC微處理器)
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