參數(shù)資料
型號(hào): μPD30181
廠商: NEC Corp.
英文描述: 64-Bit RISC Microprosessor(64位RISC微處理器)
中文描述: 64位RISC Microprosessor(64位的RISC微處理器)
文件頁數(shù): 19/68頁
文件大小: 270K
代理商: ΜPD30181
19
μ
PD30700,30700L,30710
2.2 CPU Registers (virtual registers)
Figure 2-2 shows the CPU registers of the V
R
10000. Physically, sixty-four general-purpose registers are available.
Of these, however, only thirty-two can be accessed by software or an external agent. Mapping of the other registers
is automatically controlled by the CPU. The bit width of a register is determined by the operation mode of the V
R
10000
(32 bits in 32-bit mode, or 64 bits in 64-bit mode).
Of the thirty-two general-purpose registers, the following two have special meanings.
Register r0 : The contents of this register are always 0. Register r0 can be used as the target register of
an instruction when the result of an operation is to be discarded. This register can also be
used as a source register when the value of 0 is necessary.
Register r31: This is a link system for the JAL and JALR instructions. Therefore, do not use this register
with any other instructions.
Two multiplication/division registers (HI and LO) are used to store the result of integer multiplication, or quotient
(LO) and remainder (HI) resulting from integer division.
The load link register is used to synchronize two or more V
R
10000s in a multi-processor system.
Figure 2-2. CPU Registers
There is no program status word (PSW). The function of PSW is substituted by the status register and cause register
incorporated into the system control coprocessor (CP0).
63
0
63
0
63
0
r0 = 0
r1
r2
r29
r30
r31 (link address)
HI
LO
PC
0
Load link register
LLbit
63
0
General-purpose registers
Multiplication/division register
Program counter
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