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參數(shù)資料
| 型號： | μPD30181 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-Bit RISC Microprosessor(64位RISC微處理器) |
| 中文描述： | 64位RISC Microprosessor（64位的RISC微處理器） |
| 文件頁數(shù)： | 14/68頁 |
| 文件大小： | 270K |
| 代理商： | ΜPD30181 |
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14
μ
PD30700,30700L,30710
(2/3)
Pin Name
I/O
Function
SysGnt
Input
System enable.
Signal used by an external agent to request the V
R
10000 for use of the system interface.
SysRel
I/O
System release.
The master side of the system interface asserts this signal active for the duration of 1
SysClk cycle when it releases the right to use the system interface in the subsequent
SysClk cycle.
SysRdRdy
Input
System read ready.
Indicates that the external agent is ready to accept a processor read request and upgrade
request.
SysWrRdy
Input
System write ready.
Indicates that the external agent is ready to accept a processor write request and processor
eliminate request.
SysAD (63 : 0)
I/O
System address/data bus.
64-bit address/data bus for communication between the V
R
10000 and external agent.
SysADChk (7 : 0)
I/O
System address/data check bus.
8-bit ECC bus for SysAD bus.
SysCmd (11 : 0)
I/O
System command bus.
12-bit bus for command communication between the V
R
10000 and external agent.
SysCmdPar
I/O
System command bus parity.
One odd parity bit for the system command bus.
SysVal
I/O
System valid.
Signal indicating that the master side of the system interface drives a valid address/
command/data onto the SysAD bus and SysCmd bus.
SysState (2 : 0)
Output
System state bus.
3-bit bus indicating issuance or addition of a processor coherent status response.
SysStatePar
Output
System state bus parity.
One odd parity bit for the system state bus.
SysStateVal
Output
System state bus valid.
The V
R
10000 asserts this signal active for the duration of 1 SysClk cycle when it issues
a processor coherent response status to the SysState bus.
SysResp (4 : 0)
Input
System response bus.
5-bit bus used by the external agent to issue an external end response.
SysRespPar
Input
System response bus parity.
One odd parity bit for the system response bus.
SysRespVal
Input
System response bus valid.
The external agent asserts this signal active for 1 SysClk cycle when it issues an external
end response to the SysResp bus.
SysReset
Input
System reset.
Signal used by the external agent to reset the V
R
10000.
SysNMI
Input
System non-maskable interrupt.
Signal used by the external agent to issue NMI.
SysCorErr
Output
System correctable error.
The V
R
10000 asserts this signal active for 1 SysClk cycle when it finds and correct a
correctable error.
SysUncErr
Output
System uncorrectable error.
The V
R
10000 asserts this signal active for 1 SysClk cycle when it finds an uncorrectable
tag error.
相關PDF資料 |
PDF描述 |
|---|---|
| μPD30210 | 64-Bit MIPS RISC Microprocessor(64位MIPS RISC 微處理器) |
| μPD30200 | High-Performance, 64-Bit RISC Microprosessor(高性能64位RISC微處理器) |
| μPD30700L | 64-Bit Microprocessor(64位RISC微處理器) |
| μPD30700 | 64-Bit Microprocessor(64位RISC微處理器) |
| μPD30710 | 64-Bit Microprocessor(64位RISC微處理器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PD302 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PHOTOTRANSISTOR | DARLINGTON | 800NM PEAK WAVELENGTH | 30M | DOME-5.0 |
| PD3032 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Li-ion Rechargeable Battery |
| PD306 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PHOTOTRANSISTOR | DARLINGTON | 800NM PEAK WAVELENGTH | 30M | DOME-3.0 |
| PD307 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PHOTOTRANSISTOR | DARLINGTON | 800NM PEAK WAVELENGTH | 30M | LED-2A |
| PD308 | 制造商:NIEC 制造商全稱:Nihon Inter Electronics Corporation 功能描述:DIODE MODULE 30A/800V |
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