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參數(shù)資料
| 型號： | 20726 |
| 英文描述： | 3DNow!? Technology Manual AMD-K6 Processor Multimedia Technology |
| 中文描述： | 3DNow！？技術手冊的AMD - K6處理器多媒體技術 |
| 文件頁數(shù)： | 25/120頁 |
| 文件大小： | 1284K |
| 代理商： | 20726 |
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MMX Instruction Set
19
20726D/0—January 2000
AMD-K6 MMX Enhanced Processor Multimedia Technology
Preliminary Information
MOVD
mnemonic
opcode
description
MOVD mmreg1, reg32/mem32
0F 6Eh
Copy a 32-bit value from the general purpose register or
memory location into the MMX register
Copy a 32-bit value from the MMX register into the general
purpose register or memory location
MOVD reg32/mem32, mmreg1
0F 7Eh
Privilege:
Registers Affected:
Flags Affected:
Exceptions Generated:
none
MMX
none
The MOVD instruction moves a 32-bit data value from an MMX register to a general
purpose register or memory, or it moves the 32-bit data from a general purpose
register or memory into an MMX register. If the 32-bit data to be moved is provided by
an MMX register, the instruction moves bits 31–0 of the MMX register into the
specified register or memory location. If the 32-bit data is being moved into an MMX
register, the instruction moves the 32-bits of data into bits 31–0 of the MMX register
and fills bits 63–32 with zeros.
Related Instructions
See the MOVQ instruction.
Exception
Invalid opcode (6)
Device not available (7)
Real
X
X
Virtual
8086
X
X
Protected Description
X
X
The emulate MMX instruction bit (EM) of the control register (CR0) is set to 1.
Save the floating-point or MMX state if the task switch bit (TS) of the control
register (CR0) is set to 1.
During instruction execution, the stack segment limit was exceeded.
During instruction execution, the effective address of one of the segment
registers used for the operand points to an illegal memory location.
One of the instruction data operands falls outside the address range 00000h
to 0FFFFh.
A page fault resulted from the execution of the instruction.
An exception is pending due to the floating-point execution unit.
Stack exception (12)
General protection (13)
X
X
Segment overrun (13)
X
X
Page fault (14)
Floating-point exception
pending (16)
Alignment check (17)
X
X
X
X
X
X
X
An unaligned memory reference resulted from the instruction execution,
and the alignment mask bit (AM) of the control register (CR0) is set to 1.
(In Protected Mode, CPL = 3.)
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