參數(shù)資料
型號: 20726
英文描述: 3DNow!? Technology Manual AMD-K6 Processor Multimedia Technology
中文描述: 3DNow?。考夹g(shù)手冊的AMD - K6處理器多媒體技術(shù)
文件頁數(shù): 66/120頁
文件大?。?/td> 1284K
代理商: 20726
60
MMX Instruction Set
AMD-K6 MMX Enhanced Processor Multimedia Technology
20726D/0—January 2000
Preliminary Information
Functional Illustration of the PMADDWD Instruction
The following list explains the functional illustration of the PMADDWD instruction:
I
The signed 16-
bit negative value FFFEh (–2) is multiplied by the signed 16-bit
positive value 0002h to produce a signed 32-bit negative intermediate result of
FFFF_FFFCh (–4).
The signed 16-bit positive value 7FFFh is multiplied by the signed 16-bit positive
value 7FFFh to produce a signed 32-bit positive intermediate result of
3FFF_0001h.
The two 32-bit intermediate results are added together to produce the final signed
32-bit positive result of 3FFE_FFFDh.
The signed 16-bit positive value 7007h is multiplied by the signed 16-bit positive
value 0FF9h to produce a signed 32-bit intermediate result of 06FD_5FCFh.
The signed 16-bit negative value FFFFh (–1) is multiplied by the signed 16-bit
negative value FFFFh (–1) to produce a signed 32-bit positive intermediate result
of 0000_0001h.
The two 32-bit intermediate results are added together to produce the final signed
32-bit positive result of 06FD_5FD0h.
I
I
I
I
I
Related Instructions
See the PMULHW instruction.
See the PMULLW instruction.
06FD_5FCFh
0000_0001h
=
=
=
=
mmreg2/mem64
mmreg1
FFFFh
0FF9h
7FFFh
0002h
63
0
mmreg1
06FD_5FD0h
63
0
3FFE_FFFDh
FFFF_FFFCh
3FFF_0001h
48
47
32
31
16
15
FFFFh
7007h
7FFFh
FFFEh
63
0
48
47
32
31
16
15
intermediate results
FFFF_FFFCh
+
=
=
+
0000_0001h
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