參數(shù)資料
型號(hào)： 24850
英文描述： Parasite-Power Digital Thermometer
中文描述： Socket 754的設(shè)計(jì)和資格要求
文件頁(yè)數(shù)： 30/40頁(yè)
文件大小： 2405K
代理商： 24850
Socket 754 Design and Qualification Requirements
24850 Rev. 3.07 August 2003
7.1.2.2
Test Condition
Test Frequencies are 500 MHz and 2 GHz.
Use a validated “industry standard” 3-D EM field solver.
The computed data is not used in any calculations involving measured data.
7.1.2.3
Requirements
Mated partial self-inductance is 4 nH maximum, assuming the current return is at infinity.
7.1.3
Mated Loop Inductance
The following procedures are required to properly test for mated loop inductance.
7.1.3.1
Test Procedure
The inductance of a loop is formed by a pair of pins. All current is injected in one pin and returned
through the other. On a vector network analyzer using one port measurement, read the values from the
Smith chart at the specified frequencies.
7.1.3.2
Test Frequencies: 10 MHz (or 500 MHz) and 2 GHz
See Figure 6 on page 29 for pin placement.
Test Condition
7.1.3.3
Requirements
Mated Loop inductance shall be 3 nH ± 10%—two nearest pins, current in one pin, return the other
pin. Record all pin pattern readings, but use only the nearest neighbors for qualification.
7.1.4
Mated Partial Loop Inductance Matrix
The following procedures are required to properly test for mated partial loop inductance from
measured mated loop inductance data.
Figure 7 shows the loop measurement for extracting [L
P
] for a mated three-pin combination
Figure 7. Loop Measurement for Extracting [L
P
] for a Mated Three-Pin Combination
30
Electrical Qualification Requirements
Chapter 7
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