參數(shù)資料
型號(hào)： 24850
英文描述： Parasite-Power Digital Thermometer
中文描述： Socket 754的設(shè)計(jì)和資格要求
文件頁(yè)數(shù)： 35/40頁(yè)
文件大?。?/td> 2405K
代理商： 24850
24850 Rev. 3.07 August 2003
Socket 754 Design and Qualification Requirements
7.4.1.2
Test Condition
For the time domain method:
Time delay of single-ended signals between the top pads of the interposer and the pads on the bottom
side fixture.
The ground return for the specified signal pin pattern of single ended signals is to be located as
specified
7.4.1.3
Requirements
Delta delay (skew) among single ended pins between the top of the μPGA package and PCB
under the Socket 754 must be 10 ps maximum plus 3 ps maximum measurement error.
Three pins S1, S2, and G should be used for this measurement.
7.4.2
Differential Propagation Delay Skew
The following procedures are required to properly test for differential propagation delay skew.
7.4.2.1
Test Procedure
Use the procedures shown in EIA-364–103 and section 7.4.1.1 on page 34.
7.4.2.2
Test Condition
For the time domain method:
Time delay of a differential signal between the top pads of the interposer and the pads on the bottom
side of the fixture.
7.4.2.3
Delta delay (skew) of a differential signal between the top of the μPGA Package and PCB under
the Socket 754 must be 10 ps maximum plus 3 ps maximum measurement error.
Three Pins S1, S2 and G should be used for this measurement
Requirements
7.5
Capacitance
At low frequencies, the measurement of the capacitance should be carried out according to the EIA
Standard EIA-364-30. Two types of measurements are required—single capacitance between the two
nearest pins that are separated by 1.27mm and Maxwell capacitance matrix for multiple pins.
7.5.1
Test Procedures
Use the procedures shown in EIA-364-30 and section7.1.2.2 on page 30.
Chapter 7
Electrical Qualification Requirements
35
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