參數(shù)資料
型號(hào): 28F0101024K
廠商: Intel Corp.
英文描述: 28F010 1024K (128K X 8) CMOS FLASH MEMORY
中文描述: 28F010 1024K(128K的× 8)的CMOS閃存
文件頁(yè)數(shù): 10/33頁(yè)
文件大?。?/td> 895K
代理商: 28F0101024K
28F010
E
10
2.2.1.3
Standby
With CE# at a logic-high level, the standby
operation disables most of the 28F010’s circuitry
and
substantially
reduces
consumption. The outputs are placed in a high-
impedance state, independent of the OE# signal. If
the
28F010
is
deselected
programming, or program/erase verification, the
device draws active current until the operation is
terminated.
device
power
during
erasure,
2.2.1.4
Intelligent Identifier Operation
The intelligent identifier operation outputs the
manufacturer code (89H) and device code (B4H).
Programming equipment automatically matches the
device with its proper erase and programming
algorithms.
With CE# and OE# at a logic low level, raising A
9
to
high voltage V
ID
(see
DC Characteristics
) activates
the operation. Data read from locations 0000H and
0001H represent the manufacturer's code and the
device code, respectively.
The manufacturer and device codes can also be
read via the command register, for instances where
the 28F010 is erased and reprogrammed in the
target system. Following a write of 90H to the
command register, a read from address location
0000H outputs the manufacturer code (89H). A
read from address 0001H outputs the device code
(B4H).
2.2.1.5
Write
Device erasure and programming are accomplished
via the command register, when high voltage is
applied to the V
PP
pin. The contents of the register
serve as input to the internal state machine. The
state machine outputs dictate the function of the
device.
The command register itself does not occupy an
addressable memory location. The register is a
latch used to store the command, along with
address and data information needed to execute
the command.
The command register is written by bringing WE# to
a logic-low level (V
IL
), while CE# is low. Addresses
are latched on the falling edge of WE#, while data is
latched on the rising edge of the WE# pulse.
Standard microprocessor write timings are used.
Refer to
AC Characteristics
—Write/Erase/Program
Only Operations
and the erase/programming
waveforms for specific timing parameters.
2.2.2
COMMAND DEFINITIONS
When low voltage is applied to the V
PP
pin, the
contents of the command register default to 00H,
enabling read-only operations.
Placing high voltage on the V
PP
pin enables
read/write operations. Device operations are
selected by writing specific data patterns into the
command register. Table 3 defines these 28F010
register commands.
相關(guān)PDF資料
PDF描述
28F010 1024K (128K x 8) CMOS FLASH MEMORY
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28F0121-0SR 功能描述:FERRITE 10A 48 OHM SMD RoHS:否 類別:濾波器 >> 鐵氧體磁珠和芯片 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:EMI1812 頻率對(duì)應(yīng)阻抗:120 歐姆 @ 100MHz 額定電流:200mA DC 電阻(DCR):最大 400 毫歐 濾波器類型:差模 - 單線 封裝/外殼:1812(4532 公制) 安裝類型:表面貼裝 包裝:帶卷 (TR) 高度(最大):0.069"(1.75mm) 尺寸/尺寸:0.177" L x 0.126" W(4.50mm x 3.20mm) 其它名稱:Q1712807A