- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371435 > 28F0101024K (Intel Corp.) 28F010 1024K (128K X 8) CMOS FLASH MEMORY PDF資料下載
參數(shù)資料
| 型號： | 28F0101024K |
| 廠商： | Intel Corp. |
| 英文描述： | 28F010 1024K (128K X 8) CMOS FLASH MEMORY |
| 中文描述： | 28F010 1024K（128K的× 8）的CMOS閃存 |
| 文件頁數(shù)： | 16/33頁 |
| 文件大?。?/td> | 895K |
| 代理商： | 28F0101024K |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
28F010
E
16
3.0
DESIGN CONSIDERATIONS
3.1
Two-Line Output Control
Flash memories are often used in larger memory
arrays. Intel provides two read control inputs to
accommodate multiple memory connections. Two-
line control provides for:
a.
the lowest possible memory power dissipation
and,
b.
complete assurance that output bus contention
will not occur.
To efficiently use these two control inputs, an
address decoder output should drive chip-enable,
while the system’s read signal controls all flash
memories and other parallel memories. This
assures that only enabled memory devices have
active outputs, while deselected devices maintain
the low power standby condition.
3.2
Power Supply Decoupling
Flash memory power-switching characteristics
require
careful
device
designers are interested in three supply current
(I
CC
) issues
—standby, active, and transient current
peaks produced by falling and rising edges of chip-
enable. The capacitive and inductive loads on the
device outputs determine the magnitudes of these
peaks.
decoupling.
System
Two-line control and proper decoupling capacitor
selection will suppress transient voltage peaks.
Each device should have a 0.1 μF ceramic
capacitor connected between V
CC
and V
SS
, and
between V
PP
and V
SS
.
Place the high-frequency, low-inherent inductance
capacitors as close as possible to the devices.
Also, for every eight devices, a 4.7 μF electrolytic
capacitor should be placed at the array's power
supply connection, between V
CC
and V
SS
. The bulk
capacitor will overcome voltage slumps caused by
printed circuit board trace inductance, and will
supply charge to the smaller capacitors as needed.
3.3
V
PP
Trace on Printed Circuit
Boards
Programming flash memories, while they reside in
the target system, requires that the printed circuit
board designer pay attention to the V
PP
power
supply trace. The V
PP
pin supplies the memory cell
current for programming. Use similar trace widths
and layout considerations given the V
CC
power bus.
Adequate V
PP
supply traces and decoupling will
decrease V
PP
voltage spikes and overshoots.
3.4
Power-Up/Down Protection
The 28F010 is designed to offer protection against
accidental erasure or programming during power
transitions.
Upon
power-up,
indifferent as to which power supply, V
PP
or V
CC
,
powers up first. Power supply sequencing is not
required. Internal circuitry in the 28F010 ensures
that the command register is reset to the read mode
on power-up.
the
28F010
is
A system designer must guard against active writes
for V
CC
voltages above V
LKO
when V
PP
is active.
Since both WE# and CE# must be low for a
command write, driving either to V
IH
will inhibit
writes. The control register architecture provides an
added level of protection since alteration of memory
contents only occurs after successful completion of
the two-step command sequences.
3.5
28F010 Power Dissipation
When designing portable systems, designers must
consider battery power consumption not only during
device operation, but also for data retention during
system idle time. Flash nonvolatility increases the
usable battery life of your system because the
28F010 does not consume any power to retain
code or data when the system is off. Table 4
illustrates the power dissipated when updating the
28F010.
相關PDF資料 |
PDF描述 |
|---|---|
| 28F010 | 1024K (128K x 8) CMOS FLASH MEMORY |
| 28F016B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F032B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F160B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F800B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 28F010120EI | 制造商:Advanced Micro Devices 功能描述: |
| 28F010-120EI | 制造商:undefined 功能描述: |
| 28F010120JC | 制造商: 功能描述: 制造商:Advanced Micro Devices 功能描述: 制造商:undefined 功能描述: |
| 28F010-120JC | 制造商:undefined 功能描述: |
| 28F0121-0SR | 功能描述:FERRITE 10A 48 OHM SMD RoHS:否 類別:濾波器 >> 鐵氧體磁珠和芯片 系列:- 標準包裝:1,000 系列:EMI1812 頻率對應阻抗:120 歐姆 @ 100MHz 額定電流:200mA DC 電阻(DCR):最大 400 毫歐 濾波器類型:差模 - 單線 封裝/外殼:1812（4532 公制） 安裝類型:表面貼裝 包裝:帶卷 (TR) 高度（最大）:0.069"（1.75mm） 尺寸/尺寸:0.177" L x 0.126" W（4.50mm x 3.20mm） 其它名稱:Q1712807A |
發(fā)布緊急采購，3分鐘左右您將得到回復。