Intel
82801BA ICH2 Datasheet
9-17
LPC Interface Bridge Registers (D31:F0)
9.1.29
GEN1_DEC—LPC I/F Generic Decode Range 1
(LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
E4h–E5h
00h
Yes
Attribute:
Size:
Power Well:
R/W
16-bit
Core
9.1.30
LPC_EN—LPC I/F Enables (LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
E6h–E7h
00h
Yes
Attribute:
Size:
Power Well:
R/W
16-bit
Core
Bit
Description
15:7
Generic I/O Decode Range 1 Base Address (GEN1_BASE)
—R/W. This address is aligned on a
128-byte boundary, and must have address lines 31:16 as 0.
Note that this generic decode is for I/O addresses only, not memory addresses. The size of this
range is 128 bytes.
6:1
Reserved.
0
Generic Decode Range 1 Enable (GEN1_EN)
—R/W.
0 = Disable.
1 = Enable the GEN1 I/O range to be forwarded to the LPC I/F
Bit
Description
15:14
Reserved
13
Microcontroller Address Range Enable (CNF2_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 4Eh and 4Fh to the LPC interface. This range is used
for a microcontroller.
12
Super I/O Address Range Enable (CNF1_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 2Eh and 2Fh to the LPC interface. This range is used
for Super I/O devices.
11
Microcontroller Address Range Enable (MC_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 62h and 66h to the LPC interface. This range is used
for a microcontroller.
10
Microcontroller Address Range Enable (KBC_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 60h and 64h to the LPC interface. This range is used
for a microcontroller.
9
Game Port Address Range Enable (GAMEH_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 208h to 20Fh to the LPC interface. This range is
used for a gameport.
8
Game Port Address Range Enable (GAMEL_LPC_EN)
—R/W.
0 = Disable.
1 = Enables the decoding of the I/O locations 200h to 207h to the LPC interface. This range is
used for a gameport.
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