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參數(shù)資料
| 型號： | AD9271BSVZRL-50 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 23/60頁 |
| 文件大小： | 0K |
| 描述： | IC ADC OCT 12BIT 50MSPS 100-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 50M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 功率耗散（最大）： | 1.49W |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個差分，單極 |
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AD9271
Rev. B | Page 3 of
60
The AD9271 requires a LVPECL-/CMOS-/LVDS-compatible
sample rate clock for full performance operation. No external
reference or driver components are required for many
applications.
The ADC automatically multiplies the sample rate clock for
the appropriate LVDS serial data rate. A data clock (DCO±) for
capturing data on the output and a frame clock (FCO±) trigger
for signaling a new output byte are provided.
Powering down individual channels is supported to increase
battery life for portable applications. There is also a standby
mode option that allows quick power-up for power cycling. In CW
Doppler operation, the VGA, AAF, and ADC are powered down.
The power of the TGC path scales with selectable speed grades.
The ADC contains several features designed to maximize flexibility
and minimize system cost, such as a programmable clock, data
alignment, and programmable digital test pattern generation. The
digital test patterns include built-in fixed patterns, built-in
pseudorandom patterns, and custom user-defined test patterns
entered via the serial port interface.
Fabricated in an advanced CMOS process, the AD9271 is
available in a 16 mm × 16 mm, RoHS compliant, 100-lead
TQFP. It is specified over the industrial temperature range of
40°C to +85°C.
PRODUCT HIGHLIGHTS
1.
Small Footprint. Eight channels are contained in a small,
space-saving package. Full TGC path, ADC, and crosspoint
switch contained within a 100-lead, 16 mm × 16 mm TQFP.
2.
Low Power of 150 mW per Channel at 40 MSPS.
3.
Integrated Crosspoint Switch. This switch allows numerous
multichannel configuration options to enable the CW
Doppler mode.
4.
Ease of Use. A data clock output (DCO±) operates up to
300 MHz and supports double data rate (DDR) operation.
5.
User Flexibility. Serial port interface (SPI) control offers a wide
range of flexible features to meet specific system requirements.
6.
Integrated Third-Order Antialiasing Filter. This filter is placed
between the TGC path and the ADC and is programmable
from 8 MHz to 18 MHz.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9271BSVZRL7-25 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9271BSVZRL7-40 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9271BSVZRL7-50 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9272 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9272_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
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