參數(shù)資料
型號(hào)： AD9271BSVZRL-50
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 26/60頁(yè)
文件大?。?/td> 0K
描述： IC ADC OCT 12BIT 50MSPS 100-TQFP
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 12
采樣率（每秒）： 50M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 8
功率耗散（最大）： 1.49W
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 100-TQFP-EP（14x14）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 8 個(gè)單端，單極；8 個(gè)差分，單極
AD9271
Rev. B | Page 32 of
60
The format of the output data is offset binary by default. An
example of the output coding format can be found in Table 9.
To change the output data format to twos complement, see the
Memory Map section.
Table 9. Digital Output Coding
Code
(VIN+) (VIN),
Input Span = 2 V p-p (V)
Digital Output Offset Binary
(D11 ... D0)
4095
+1.00
1111 1111 1111
2048
0.00
1000 0000 0000
2047
0.000488
0111 1111 1111
0
1.00
0000 0000 0000
Data from each ADC is serialized and provided on a separate
channel. The data rate for each serial stream is equal to 12 bits
times the sample clock rate, with a maximum of 600 Mbps
(12 bits × 50 MSPS = 600 Mbps). The lowest typical conversion
rate is 10 MSPS, but the PLL can be set up for encode rates as
low as 5 MSPS via the SPI if lower sample rates are required for
a specific application. See the Memory Map section for details
on enabling this feature.
Two output clocks are provided to assist in capturing data from
the AD9271. DCO± is used to clock the output data and is equal
to six times the sampling clock rate. Data is clocked out of the
AD9271 and must be captured on the rising and falling edges of
the DCO± that supports double data rate (DDR) capturing. The
frame clock output (FCO±) is used to signal the start of a new
output byte and is equal to the sampling clock rate. See the
timing diagram shown in Figure 2 for more information.
Table 10. Flexible Output Test Modes
Output Test Mode
Bit Sequence
Pattern Name
Digital Output Word 1
Digital Output Word 2
Subject to Data
Format Select
0000
Off (default)
N/A
0001
Midscale short
1000 0000 (8 bits)
10 0000 0000 (10 bits)
1000 0000 0000 (12 bits)
10 0000 0000 0000 (14 bits)
Same
Yes
0010
+Full-scale short
1111 1111 (8 bits)
11 1111 1111 (10 bits)
1111 1111 1111 (12 bits)
11 1111 1111 1111 (14 bits)
Same
Yes
0011
Full-scale short
0000 0000 (8 bits)
00 0000 0000 (10 bits)
0000 0000 0000 (12 bits)
00 0000 0000 0000 (14 bits)
Same
Yes
0100
Checkerboard
1010 1010 (8 bits)
10 1010 1010 (10 bits)
1010 1010 1010 (12 bits)
10 1010 1010 1010 (14 bits)
0101 0101 (8 bits)
01 0101 0101 (10 bits)
0101 0101 0101 (12 bits)
01 0101 0101 0101 (14 bits)
No
0101
PN sequence long1
N/A
Yes
0110
PN sequence short1
N/A
Yes
0111
One-/zero-word toggle
1111 1111 (8 bits)
11 1111 1111 (10 bits)
1111 1111 1111 (12 bits)
11 1111 1111 1111 (14 bits)
0000 0000 (8 bits)
00 0000 0000 (10 bits)
0000 0000 0000 (12 bits)
00 0000 0000 0000 (14 bits)
No
1000
User input
Register 0x19 and Register 0x1A
Register 0x1B and Register 0x1C
No
1001
1-/0-bit toggle
1010 1010 (8 bits)
10 1010 1010 (10 bits)
1010 1010 1010 (12 bits)
10 1010 1010 1010 (14 bits)
N/A
No
1010
1× sync
0000 1111 (8 bits)
00 0001 1111 (10 bits)
0000 0011 1111 (12 bits)
00 0000 0111 1111 (14 bits)
N/A
No
1011
One bit high
1000 0000 (8 bits)
10 0000 0000 (10 bits)
1000 0000 0000 (12 bits)
10 0000 0000 0000 (14 bits)
N/A
No
1100
Mixed bit frequency
1010 0011 (8 bits)
10 0110 0011 (10 bits)
1010 0011 0011 (12 bits)
10 1000 0110 0111 (14 bits)
N/A
No
1 All test mode options except PN sequence short and PN sequence long can support 8- to 14-bit word lengths in order to verify data capture to the receiver.
相關(guān)PDF資料
PDF描述
VE-J6Z-EY-S CONVERTER MOD DC/DC 2V 20W
MS27656T15B19PB CONN RCPT 19POS WALL MNT W/PINS
LTC487ISW#TR IC DRIVER RS485 QUAD LP 16SOIC
VE-J6K-MW-B1 CONVERTER MOD DC/DC 40V 100W
VI-BVV-MY CONVERTER MOD DC/DC 5.8V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9271BSVZRL7-25 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch
AD9271BSVZRL7-40 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch
AD9271BSVZRL7-50 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch
AD9272 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch
AD9272_09 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*