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參數(shù)資料
| 型號： | AD9271BSVZRL-50 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 37/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC OCT 12BIT 50MSPS 100-TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 50M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 功率耗散（最大）： | 1.49W |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP-EP（14x14） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 8 個單端，單極；8 個差分，單極 |
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AD9271
Rev. B | Page 42 of
60
EVALUATION BOARD
The AD9271 evaluation board provides all the support circuitry
required to operate the AD9271 in its various modes and con-
figurations. The LNA is driven differentially through a transformer.
Figure 73 shows the typical bench characterization setup used
to evaluate the ac performance of the AD9271. It is critical that
the signal sources used for the analog input and clock have very low
phase noise (<1 ps rms jitter) to realize the optimum performance
of the signal chain. Proper filtering of the analog input signal to
remove harmonics and lower the integrated or broadband noise at
the input is also necessary to achieve the specified noise performance.
See the Quick Start Procedure section to get started and Figure 75
to Figure 86 for the complete schematics and layout diagrams
that demonstrate the routing and grounding techniques that
should be applied at the system level.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output.
Connect the supply to the rated 100 V ac to 240 V ac wall outlet
at 47 Hz to 63 Hz. The other end is a 2.1 mm inner diameter
jack that connects to the PCB at P701. Once on the PC board,
the 6 V supply is fused and conditioned before connecting to
three low dropout linear regulators that supply the proper bias
to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
L702 to L704 can be removed to disconnect the switching
power supply. This enables the user to bias each section of the
board individually. Use P501 to connect a different supply for
each section. At least one 1.8 V supply is needed with a 1 A current
capability for AVDD_DUT and DRVDD_DUT; however, it is
recommended that separate supplies be used for both analog
and digital domains. To operate the evaluation board using the
SPI and alternate clock options, a separate 3.3 V analog supply
is needed in addition to the other supplies. The 3.3 V supply, or
AVDD_3.3 V, should have a 1 A current capability.
To bias the crosspoint switch circuitry or CW section, separate
+5 V and 5 V supplies are required at P511. These should each
have 1 A current capability. This section cannot be biased from
a 6 V, 2 A wall supply. Separate supplies are required at P511.
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as Rohde & Schwarz SMA
or HP8644B signal generators or the equivalent. Use a 1 m, shielded,
RG-58, 50 Ω coaxial cable for making connections to the evalu-
ation board. Enter the desired frequency and amplitude from the
specifications tables. The evaluation board is set up to be clocked
from the crystal oscillator, OSC401. If a different or external clock
source is desired, follow the instructions for CLOCK outlined in
the Default Operation and Jumper Selection Settings section.
Typically, most Analog Devices evaluation boards can accept
~2.8 V p-p or 13 dBm sine wave input for the clock. When
connecting the analog input source, it is recommended to use a
multipole, narrow-band, band-pass filter with 50 Ω terminations.
Analog Devices uses TTE and K&L Microwave, Inc., band-pass
filters. The filter should be connected directly to the evaluation board.
OUTPUT SIGNALS
The default setup uses the FIFO5 high speed, dual-channel
FIFO data capture board (HSC-ADC-EVALCZ). Two of the
eight channels can then be evaluated at the same time. For more
information on channel settings on these boards and their optional
settings, visit www.analog.com/FIFO.
ROHDE & SCHWARZ,
SMA,
2V p-p SIGNAL
SYNTHESIZER
ROHDE & SCHWARZ,
FS5A20
SPECTRUM
ANALYZER
BAND-PASS
FILTER
CH A TO CH H
12-BIT
SERIAL
LVDS
AD9271
HSC-ADC-EVALCZ
FIFO DATA
CAPTURE
BOARD
FPGA
PC
RUNNING
ADC
ANALYZER
OR
VISUAL
ANALOG
USER
SOFTWARE
1.8V
–+
A
V
D
_DUT
VR
E
G
D
R
V
D
D_DUT
GN
D
A
V
DD_3.
3V
GN
D
GN
D
1.8V
6V DC
2A MAX
VFAC3
OSCILLATOR
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
–+
GN
D
3.3V
–+
PS
SPI
06
30
4-
0
70
ANALOG INPUT
CW OUTPUT
CLK
EVALUATION BOARD
USB
CONNECTOR
(DATA/SPI)
Figure 73. Evaluation Board Connection
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9271BSVZRL7-25 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9271BSVZRL7-40 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9271BSVZRL7-50 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9272 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9272_09 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
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