參數(shù)資料
型號(hào)： AD9558BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 104/104頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK TRANSLATOR 64LFCSP
產(chǎn)品變化通告： AD9558 Minor Metal Mask Change 17/Apr/2012
標(biāo)準(zhǔn)包裝： 1
類型： 時(shí)鐘/頻率轉(zhuǎn)換器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH，Stratum
輸入： CMOS，LVDS，LVPECL
輸出： CMOS，HSTL，LVDS
電路數(shù)： 1
比率 - 輸入:輸出： 4:6
差分 - 輸入:輸出： 是/是
頻率 - 最大： 1.25GHz
電源電壓： 1.71 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 托盤
Data Sheet
AD9558
Rev. B | Page 99 of 104
Table 117. EEPROM Storage Sequence for Output PLL Settings
Address
Bits
Bit Name
Description
0x0E1D
[7:0]
APLL
The default value of this register is 0x08, which the controller interprets as a data instruction. Its
decimal value is 8, which tells the controller to transfer nine bytes of data (8 + 1), beginning at the
address that is specified by the next two bytes. The controller stores 0x08 in the EEPROM and
increments the EEPROM address pointer.
0x0E1E
[7:0]
The default value of these two registers is 0x0400. Note that Register 0x0E1E and Register 0x0E1F
are the most significant and least significant bytes of the target address, respectively. Because the
previous register contains a data instruction, these two registers define a starting address (in this
case, 0x0400). The controller stores 0x0400 in the EEPROM and increments the EEPROM pointer by 2.
It then transfers nine bytes from the register map (beginning at Address 0x0400) to the EEPROM
and increments the EEPROM address pointer by 10 (nine data bytes and one checksum byte). The
nine bytes transferred correspond to APLL parameters in the register map.
0x0E1F
[7:0]
Table 118. EEPROM Storage Sequence for Clock Distribution Settings
Address
Bits
Bit Name
Description
0x0E20
[7:0]
Clock distribution
The default value of this register is 0x15, which the controller interprets as a data instruction. Its
decimal value is 21, which tells the controller to transfer 22 bytes of data (21+1), beginning at the
address that is specified by the next two bytes. The controller stores 0x15 in the EEPROM and
increments the EEPROM address pointer.
0x0E21
[7:0]
The default value of these two registers is 0x0500. Note that Register 0x0E21 and Register 0x0E22
are the most significant and least significant bytes of the target address, respectively. Because the
previous register contains a data instruction, these two registers define a starting address (in this
case, 0x0500). The controller stores 0x0500 in the EEPROM and increments the EEPROM pointer by 2.
It then transfers 22 bytes from the register map (beginning at Address 0x0500) to the EEPROM and
increments the EEPROM address pointer by 23 (22 data bytes and one checksum byte). The
22 bytes transferred correspond to the clock distribution parameters in the register map.
0x0E22
[7:0]
0x0E23
[7:0]
I/O update
The default value of this register is 0x80, which the controller interprets as an I/O update
instruction. The controller stores 0x80 in the EEPROM and increments the EEPROM address
pointer.
Table 119. EEPROM Storage Sequence for Reference Input Settings
Address
Bits
Bit Name
Description
0x0E24
[7:0]
Reference inputs
The default value of this register is 0x03, which the controller interprets as a data instruction. Its
decimal value is 3, so this tells the controller to transfer four bytes of data (3 + 1), beginning at the
address that is specified by the next two bytes. The controller stores 0x03 in the EEPROM and
increments the EEPROM address pointer.
0x0E25
[7:0]
The default value of these two registers is 0x0600. Note that Register 0x0E25 and Register 0x0E26
are the most significant and least significant bytes of the target address, respectively. Because the
previous register contains a data instruction, these two registers define a starting address (in this
case, 0x0600). The controller stores 0x0600 in the EEPROM and increments the EEPROM pointer by 2.
It then transfers four bytes from the register map (beginning at Address 0x0600) to the EEPROM
and increments the EEPROM address pointer by 5 (four data bytes and one checksum byte). The
four bytes that are transferred correspond to the reference inputs parameters in the register map.
0x0E26
[7:0]
Table 120. EEPROM Storage Sequence for Frame Sync Settings
Address
Bit
Bit Name
Description
0x0E27
[7:0]
Frame sync
The default value of this register is 0x01, which the controller interprets as a data instruction. Its
decimal value is 1, which tells the controller to transfer two bytes of data (1 + 1), beginning at the
address specified by the next two bytes. The controller stores 0x01 in the EEPROM and increments
the EEPROM address pointer.
0x0E28
[7:0]
The default value of these two registers is 0x0640. Note that Register 0x0E28 and Register 0x0E29
are the most significant and least significant bytes of the target address, respectively. Because the
previous register contains a data instruction, these two registers define a starting address (in this
case, 0x0640). The controller stores 0x0640 in the EEPROM and increments the EEPROM pointer by 2.
It then transfers two bytes from the register map (beginning at Address 0x0640) to the EEPROM
and increments the EEPROM address pointer by 3 (two data bytes and one checksum byte). The
two bytes transferred correspond to the reference inputs parameters in the register map.
0x0E29
[7:0]
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AD9558BCPZ-REEL7 功能描述:IC CLK XLATR PLL 1250MHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無(wú)/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
AD9559 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
AD9559/PCBZ 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
AD9559BCPZ 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
AD9559BCPZ-REEL7 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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