參數(shù)資料
型號(hào): AD9558BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 33/104頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK TRANSLATOR 64LFCSP
產(chǎn)品變化通告: AD9558 Minor Metal Mask Change 17/Apr/2012
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘/頻率轉(zhuǎn)換器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,HSTL,LVDS
電路數(shù): 1
比率 - 輸入:輸出: 4:6
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.25GHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
AD9558
Data Sheet
Rev. B | Page 34 of 104
LOOP CONTROL STATE MACHINE
Switchover
Switchover occurs when the loop controller switches directly
from one input reference to another. The AD9558 handles a
reference switchover by briefly entering holdover mode, loading
the new DPLL parameters, and then immediately recovering.
During the switchover event, however, the AD9558 preserves
the status of the lock detectors to avoid phantom unlock
indications.
Holdover
The holdover state of the DPLL is typically used when none of
the input references are present, although the user can also
manually engage holdover mode. In holdover mode, the output
frequency remains constant. The accuracy of the AD9558 in
holdover mode is dependent on the device programming and
availability of tuning word history.
Recovery from Holdover
When in holdover mode and a valid reference becomes
available, the device exits holdover operation. The loop state
machine restores the DPLL to closed-loop operation, locks to
the selected reference, and sequences the recovery of all the
loop parameters based on the profile settings for the active
reference.
Note that, if the user holdover bit is set, the device does not
automatically exit holdover when a valid reference is available.
However, automatic recovery can occur after clearing the user
holdover bit (Bit 6 in Register 0x0A01).
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