參數(shù)資料
型號: AD9558BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 46/104頁
文件大?。?/td> 0K
描述: IC CLOCK TRANSLATOR 64LFCSP
產(chǎn)品變化通告: AD9558 Minor Metal Mask Change 17/Apr/2012
標準包裝: 1
類型: 時鐘/頻率轉(zhuǎn)換器
PLL:
主要目的: 以太網(wǎng),SONET/SDH,Stratum
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,HSTL,LVDS
電路數(shù): 1
比率 - 輸入:輸出: 4:6
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.25GHz
電源電壓: 1.71 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
AD9558
Data Sheet
Rev. B | Page 46 of 104
EEPROM Conditional Processing
The condition instructions allow conditional execution of
EEPROM instructions during a download sequence. During
an upload sequence, however, they are stored as is and have
no effect on the upload process.
Note that, during EEPROM downloads, the condition instructions
themselves and the end instruction always execute unconditionally.
Conditional processing makes use of two elements: the condition
(from Condition 1 to Condition 8) and the condition tag board.
The relationships among the condition, the condition tag board,
and the EEPROM controller appear schematically in Figure 45.
The condition is a 4-bit value with 16 possibilities. Condition = 0
is the null condition. When the null condition is in effect, the
EEPROM controller executes all instructions unconditionally.
Condition 9 through Condition 15 are not accessible using the
M pins. The remaining eight possibilities (that is, Condition = 1
through Condition = 8) modify the EEPROM controller’s
handling of a download sequence. The condition originates
from one of two sources (see Figure 45), as follows:
FncInit, Bits[3:0], which is the state of the M2 and M3
multifunction pins at power-up (see Table 22)
Register 0x0E01, Bits[3:0]
If Register 0x0E01, Bits[3:0] ≠ 0, then the condition is the value
that is stored in Register 0x0E01, Bits[3:0]; otherwise, the condition
is FncInit, Bits[3:0]. Note that a nonzero condition that is present
in Register 0x0E01, Bits[3:0] takes precedence over FncInit,
Bits[3:0].
The condition tag board is a table maintained by the EEPROM
controller. When the controller encounters a condition instruc-
tion, it decodes the B1 through CF instructions as Condition = 1
through Condition = 8, respectively, and tags that particular
condition in the condition tag board. However, the B0 condition
instruction decodes as the null condition, for which the controller
clears the condition tag board; and subsequent download
instructions execute unconditionally (until the controller
encounters a new condition instruction).
During download, the EEPROM controller executes or skips
instructions depending on the value of the condition and the
contents of the condition tag board. Note, however, that the
condition instructions and the end instruction always execute
unconditionally during download. If condition = 0, then all
instructions during download execute unconditionally. If
Condition ≠ 0 and there are any tagged conditions in the condition
tag board, then the controller executes instructions only if the
condition is tagged. If the condition is not tagged, then the
controller skips instructions until it encounters a condition
instruction that decodes as a tagged condition. Note that the
condition tag board allows for multiple conditions to be tagged
at any given moment. This conditional processing mechanism
enables the user to have one download instruction sequence
with many possible outcomes depending on the value of the
condition and the order in which the controller encounters
condition instructions.
EXAMPLE
CONDITION 3 AND
CONDITION 13
ARE TAGGED
EEPROM
EEPROM CONTROLLER
UPLOAD
PROCEDURE
CONDITION
HANDLER
DOWNLOAD
PROCEDURE
CONDITION
TAG BOARD
1
6
5
4
3
2
11
10
9
8
7
30
31
24
23
22
21
20
19
18
17
16
15
14
13
12
25
26
27
28
29
IF B1 ≤ INSTRUCTION ≤ CF,
THEN TAG DECODED CONDITION
EXECUTE/SKIP
INSTRUCTION(S)
SCRATCH
PAD
COND ITION
CONDITION = 0E01
, BITS[3:0]
ELSE
CONDITION = FncInit,
BITS[3:0]
ENDIF
M3 AND M2 PINS
(3-LEVEL LOGIC)
IF INSTRUCTION = B0,
THEN CLEAR ALL TAGS
FncInit, BITS[3:0]
REGISTER
0x0E01, BITS[3:0]
STORE CONDITION
INSTRUCTIONS AS
THEY ARE READ FROM
THE SCRATCH PAD.
WATCH FOR
OCCURRENCE OF
CONDITION
INSTRUCTIONS
DURING
DOWNLOAD.
IF {NO TAGS} OR {CONDITION = 0}
EXECUTE INSTRUCTIONS
ELSE
IF {CONDITION IS TAGGED}
EXECUTE INSTRUCTIONS
ELSE
SKIP INSTRUCTIONS
ENDIF
4
IF {0E01, BITS[3:0] ≠ 0}
09758-
025
Figure 45. EEPROM Conditional Processing
相關(guān)PDF資料
PDF描述
AD9557BCPZ IC CLOCK TRANSLATOR 40LFCSP
V375C36M150BG CONVERTER MOD DC/DC 36V 150W
AD9547BCPZ IC CLOCK GEN/SYNCHRONIZR 64LFCSP
D38999/20MF11JN CONN RCPT 11POS WALL MNT W/SCKT
AD9549ABCPZ IC CLOCK GEN/SYNCHRONIZR 64LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9558BCPZ-REEL7 功能描述:IC CLK XLATR PLL 1250MHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標準包裝:28 系列:- 類型:時鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP (0.240",6.10mm 寬) 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件
AD9559 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
AD9559/PCBZ 功能描述:時鐘和定時器開發(fā)工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
AD9559BCPZ 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
AD9559BCPZ-REEL7 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56