參數(shù)資料
型號: AD9895KBCZ
廠商: Analog Devices Inc
文件頁數(shù): 26/58頁
文件大?。?/td> 0K
描述: IC CCD SIGNAL PROC/GEN 64-CSPBGA
標(biāo)準(zhǔn)包裝: 1
類型: CCD 信號處理器,12 位
輸入類型: 邏輯
輸出類型: 邏輯
接口: 3 線串口
安裝類型: 表面貼裝
封裝/外殼: 64-VFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 64-CSPBGA(9x9)
包裝: 托盤
REV. A
–32–
AD9891/AD9895
VD
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN STEERING TO “0101” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN STEERING BETWEEN “0101” AND “1212” LINES.
3. ALL FIELDS WILL HAVE THE SAME PxGA GAIN STEERING PATTERN (FLD STATUS IS IGNORED).
HD
00
0
11
22
11
22
X
PxGA GAIN
REGISTER
FLD
ODD FIELD
EVEN FIELD
Figure 39c. Mosaic Repeat Color Steering Mode
VD
NOTES
1. EACH LINE FOLLOWS “012012” STEERING PATTERN.
2. VD AND HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO GAIN REGISTER “0.”
3. FLD STATUS IS IGNORED.
HD
02
0
2
10
02
10
02
10
X
PxGA GAIN
REGISTER
FLD
ODD FIELD
EVEN FIELD
Figure 39d. 3-Color 1-Color Steering Mode
VD
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN REGISTER STEERING TO “012012” LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN REGISTER STEERING BETWEEN “012012” AND “210210” LINES.
3. FLD STATUS IS IGNORED.
HD
02
0
2
10
20
12
20
12
X
PxGA GAIN
REGISTER
FLD
ODD FIELD
EVEN FIELD
Figure 39e. 3-Color 2-Color Steering Mode
VD
NOTES
1. EACH LINE FOLLOWS “01230123” STEERING PATTERN.
2. VD AND HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO GAIN REGISTER “0.”
3. FLD STATUS IS IGNORED.
HD
02
0
2
13
02
13
02
13
X
PxGA GAIN
REGISTER
FLD
ODD FIELD
EVEN FIELD
Figure 39f. 4-Color 1-Color Steering Mode
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