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| 型號： | ADSP-21065LKSZ-264 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 32/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLL 544KBIT 208-MQFP |
| 產(chǎn)品培訓(xùn)模塊： | SHARC Processor Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點 |
| 接口： | 主機(jī)接口，串行端口 |
| 時鐘速率： | 60MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 64kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 208-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 208-MQFP（28x28） |
| 包裝： | 托盤 |
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REV. C
ADSP-21065L
–38–
POWER DISSIPATION
Total power dissipation has two components: one due to inter-
nal circuitry and one due to the switching of external output
drivers. Internal power dissipation depends on the sequence in
which instructions execute and the data operands involved. See
IDDIN calculation in Electrical Characteristics section. Internal
power dissipation is calculated this way:
PINT = IDDIN
VDD
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
– the number of output pins that switch during each cycle (O)
– the maximum frequency at which the pins can switch (f)
– the load capacitance of the pins (C)
– the voltage swing of the pins (VDD).
The external component is calculated using:
PEXT = O
C VDD2 f
The load capacitance should include the processor’s package
capacitance (CIN). The frequency f includes driving the load
high and then back low. Address and data pins can drive high
and low at a maximum rate of 1/tCK while in SDRAM burst
mode.
Example:
Estimate PEXT with the following assumptions:
–a system with one bank of external memory (32-bit)
–two 1M
16 SDRAM chips, each with a control signal load
of 3 pF and a data signal load of 4 pF
– external data writes occur in burst mode, two every 1/tCK
cycles, a potential frequency of 1/tCK cycles/s. Assume 50%
pin switching
– the external SDRAM clock rate is 60 MHz (2/tCK).
The PEXT equation is calculated for each class of pins that can
drive:
Table V. External Power Calculations
Pin
# of
%
Type
Pins Switching
C
f
VDD
2
= PEXT
Address
11
50
10.7 30 MHz 10.9 V = 0.019 W
MS
0
10
10.7 —
10.9 V = 0.000 W
SDWE
10
10.7 —
10.9 V = 0.000 W
Data
32
50
7.7
30 MHz 10.9 V = 0.042 W
SDRAM CLK 1
–
10.7 30 MHz 10.9 V = 0.007 W
PEXT = 0.068 W
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation. (IDDIN
see calculation in Electrical Characteristics section):
PTOTAL = PEXT + (IDDIN
VDD)
Note that the conditions causing a worst-case PEXT differ from
those causing a worst-case PINT. Maximum PINT cannot occur
while 100% of the output pins are switching from all ones (1s)
to all zeros (0s). Note also that it is not common for an appli-
cation to have 100% or even 50% of the outputs switching
simultaneously.
ENVIRONMENTAL CONDITIONS
Thermal Characteristics
The ADSP-21065L is offered in a 208-lead MQFP and a 196-
ball Mini-BGA package.
The ADSP-21065L is specified for a case temperature (TCASE).
To ensure that TCASE is not exceeded, an air flow source may be
used.
TCASE = TAMB + (PD
qCA)
TCASE =Case temperature (measured on top surface of package)
PD =
Power Dissipation in W (this value depends upon the
specific application; a method for calculating PD is
shown under Power Dissipation)
qJC = 7.1∞C/W for 208-lead MQFP
qJC = 5.1∞C/W for 196-ball Mini-BGA
Airflow
Table VI. Thermal Characteristics (208-Lead MQFP)
(Linear Ft./Min.)
0
100
200
400
600
qCA (∞C/W)
24
20
19
17
13
Table VII. 196-Ball Mini-BGA
(Linear Ft./Min.)
0
200
400
qCA (∞C/W)
38
29
23
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