參數(shù)資料
型號(hào)： ADV7393-DBRDZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 106/108頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR ADV7393
產(chǎn)品變化通告： ADV734x, ADV739x Feature Improvement
設(shè)計(jì)資源： Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®
主要目的： 視頻，視頻編碼器
已用 IC / 零件： ADV7393
已供物品： 板
相關(guān)產(chǎn)品： ADV7393BCPZ-ND - IC DAC VIDEO HDTV 10BIT 40LFCSP
ADV7393BCPZ-REEL-ND - IC DAC ENCODER VID HDTV 40-LFCSP
Data Sheet
ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 97 of 108
Table 90. 10-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
10-bit input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 91. 16-Bit 625i YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 92. 16-Bit 625i YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 93. 16-Bit 625i RGB In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x87
0x80
RGB input enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 94. 16-Bit 625i RGB In, CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC3
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled.
0x87
0x80
RGB input enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
0x8C
0xCB
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in PAL mode (27 MHz input clock).
0x8D
0x8A
0x8E
0x09
0x8F
0x2A
Table 95. 16-Bit 625i RGB In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB out. SSAF PrPb
filter enabled. Active video edge
control enabled.
0x87
0x80
RGB input enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7393EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7393WBCPZ 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays
ADV7393WBCPZ-REEL 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel
ADV73946603 制造商:LG Corporation 功能描述:Frame Assembly
ADV73946604 制造商:LG Corporation 功能描述:Frame Assembly
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