參數(shù)資料
型號: ADV7393-DBRDZ
廠商: Analog Devices Inc
文件頁數(shù): 13/108頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADV7393
產(chǎn)品變化通告: ADV734x, ADV739x Feature Improvement
設(shè)計(jì)資源: Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
標(biāo)準(zhǔn)包裝: 1
系列: Advantiv®
主要目的: 視頻,視頻編碼器
已用 IC / 零件: ADV7393
已供物品:
相關(guān)產(chǎn)品: ADV7393BCPZ-ND - IC DAC VIDEO HDTV 10BIT 40LFCSP
ADV7393BCPZ-REEL-ND - IC DAC ENCODER VID HDTV 40-LFCSP
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 12 of 108
TIMING DIAGRAMS
The following abbreviations are used in Figure 4 to Figure 11:
t9 = clock high time
t10 = clock low time
t11 = data setup time
t12 = data hold time
t13 = control output access time
t14 = control output hold time
In addition, see Table 35 for the ADV7390/ADV7391 pixel port
input configuration and Table 36 for the ADV7392/ADV7393
pixel port input configuration.
Figure 4. SD Input, 8-/10-Bit 4:2:2 YCrCb, Input Mode 000
Figure 5. SD Input, 16-Bit 4:2:2 YCrCb, Input Mode 000
t9
CLKIN
t10
CONTROL
OUTPUTS
HSYNC
VSYNC
Cr2
Cb2
Cr0
Cb0
IN MASTER/SLAVE MODE
IN SLAVE MODE
Y0
Y1
Y2
PIXEL PORT
CONTROL
INPUTS
t12
t11
t13
t14
06234-
002
IN MASTER/SLAVE MODE
IN SLAVE MODE
CLKIN
CONTROL
OUTPUTS
t9
t10
Cr2
Cb2
Cr0
Cb0
Y0
Y1
Y2
Y3
t12
t14
t11
t13
HSYNC
VSYNC
CONTROL
INPUTS
PIXEL PORT
06234-
003
相關(guān)PDF資料
PDF描述
REC5-053.3DRW/H6/C CONV DC/DC 5W 4.5-9VIN +/-3.3V
GBM30DRMI-S288 CONN EDGECARD 60POS .156 EXTEND
RMM08DTKI-S288 CONN EDGECARD 16POS .156 EXTEND
HCC05DREF-S13 CONN EDGECARD 10POS .100 EXTEND
EEC17DREN-S734 CONN EDGECARD 34POS .100 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7393EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7393WBCPZ 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays
ADV7393WBCPZ-REEL 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel
ADV73946603 制造商:LG Corporation 功能描述:Frame Assembly
ADV73946604 制造商:LG Corporation 功能描述:Frame Assembly