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參數(shù)資料
型號: ADV7393-DBRDZ
廠商: Analog Devices Inc
文件頁數(shù): 87/108頁
文件大小: 0K
描述: BOARD EVAL FOR ADV7393
產(chǎn)品變化通告: ADV734x, ADV739x Feature Improvement
設(shè)計資源: Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
標準包裝: 1
系列: Advantiv®
主要目的: 視頻,視頻編碼器
已用 IC / 零件: ADV7393
已供物品:
相關(guān)產(chǎn)品: ADV7393BCPZ-ND - IC DAC VIDEO HDTV 10BIT 40LFCSP
ADV7393BCPZ-REEL-ND - IC DAC ENCODER VID HDTV 40-LFCSP
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 8 of 108
DIGITAL INPUT/OUTPUT SPECIFICATIONS—3.3 V
VDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, VAA = 2.6 V to 3.465 V, VDD_IO = 2.97 V to 3.63 V.
All specifications TMIN to TMAX (40°C to +85°C), unless otherwise noted.
Table 6.
Parameter
Conditions
Min
Typ
Max
Unit
Input High Voltage, VIH
2.0
V
Input Low Voltage, VIL
0.8
V
Input Leakage Current, IIN
VIN = VDD_IO
±10
A
Input Capacitance, CIN
4
pF
Output High Voltage, VOH
ISOURCE = 400 A
2.4
V
Output Low Voltage, VOL
ISINK = 3.2 mA
0.4
V
Three-State Leakage Current
VIN = 0.4 V, 2.4 V
±1
A
Three-State Output Capacitance
4
pF
DIGITAL INPUT/OUTPUT SPECIFICATIONS—1.8 V
When VDD_IO is set to 1.8 V, all the digital video inputs and control inputs, such as I2C, HS, and VS, should use 1.8 V levels.
VDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, VAA = 2.6 V to 3.465 V, VDD_IO = 1.71 V to 1.89 V.
All specifications TMIN to TMAX (40°C to +85°C), unless otherwise noted.
Table 7.
Parameter
Conditions
Min
Typ
Max
Unit
Input High Voltage, VIH
0.7 VDD_IO
V
Input Low Voltage, VIL
0.3 VDD_IO
V
Input Capacitance, CIN
4
pF
Output High Voltage, VOH
ISOURCE = 400 A
VDD_IO – 0.4
V
Output Low Voltage, VOL
ISINK = 3.2 mA
0.4
V
Three-State Output Capacitance
4
pF
MPU PORT TIMING SPECIFICATIONS
VDD = 1.71 V to 1.89 V, PVDD = 1.71 V to 1.89 V, VAA = 2.6 V to 3.465 V, VDD_IO = 1.71 V to 3.63 V.
All specifications TMIN to TMAX (40°C to +85°C), unless otherwise noted.
Table 8.
Parameter
Conditions
Min
Typ
Max
Unit
MPU PORT, I2C MODE1
SCL Frequency
0
400
kHz
SCL High Pulse Width, t1
0.6
s
SCL Low Pulse Width, t2
1.3
s
Hold Time (Start Condition), t3
0.6
s
Setup Time (Start Condition), t4
0.6
s
Data Setup Time, t5
100
ns
SDA, SCL Rise Time, t6
300
ns
SDA, SCL Fall Time, t7
300
ns
Setup Time (Stop Condition), t8
0.6
s
1
Guaranteed by characterization.
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