參數(shù)資料
型號(hào): AM79C960
廠商: Advanced Micro Devices, Inc.
英文描述: PCnetTM-ISA Single-Chip Ethernet Controller
中文描述: PCnetTM -的ISA單芯片以太網(wǎng)控制器
文件頁(yè)數(shù): 75/127頁(yè)
文件大小: 814K
代理商: AM79C960
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P R E L I M I N A R Y
AMD
1-417
Am79C960
tMMR3 and tMMW3 are nomi-
nally set to 100 ns.
EADI Select. Enables EADI
match mode. XMAUSEL must be
0.
Auto-Wake. If LNKST is set and
AWAKE = “1”, the 10BASE-T
receive circuitry is active during
sleep and listens for Link Pulses.
LED0 indicates Link Status and
goes active if the 10BASE-T port
comes of out of “l(fā)ink fail” state.
This LED0 pin can be used by ex-
ternal circuitry to re-enable the
PCnet-ISA
controller
other devices.
When AWAKE = “0”, the Auto-
Wake circuity is disabled. This bit
only has meaning when the
10BASE-T network interface is
selected.
Auto Select. When set, the
PCnet-ISA controller will auto-
matically select the operating
media interface port. Set by
Reset.
External MAU Select allows the
hardware selection of AUI or
10BASE-T interfaces when set.
When cleared, the interface is
selected by software. Cleared by
RESET.
3
EADISEL
2
AWAKE
and/or
1
ASEL
0
XMAUSEL
ASEL
(Bit 1)
XMAUSEL
(Bit 0)
Selection Mode
0
0
Software; interface selection is
done through the PORTSEL[1:0]
bits in CSR15.
0
1
Jumper; interface selection is
done through the MAUSEL pin.
1
0
Automatic (default)
1
1
Reserved
ISACSR4:
LED0
Status (Link Integrity)
Bit
Name
Description
ISACSR4 is a non-programma-
ble register that uses one bit to
reflect the status of the
LED0
pin.
This pin defaults to twisted pair
MAU Link Status (LNKST) and is
not programmable.
LNKST is a read-only register bit
that indicates whether the Link
Status LED is asserted. When
LNKST is read as zero, the Link
Status LED is not asserted.
When LNKST is read as one, the
15
LNKST
Link Status LED is asserted, indi-
cating good 10BASE-T integrity.
Reserved locations. Written as 0,
read as undefined.
14-0
RES
ISACSR5:
LED1
Status
Bit
Name
Description
ISACSR5 controls the func-
tion(s) that the
LED1
pin
displays. Multiple functions can
be simultaneously enabled on
this LED pin. The LED display will
indicate the logical OR of the en-
abled
functions.
defaults to Receive Status (RCV)
with pulse stretcher enabled
(PSE = 1) and is fully program-
mable.
Indicates the current (non-
stretched) state of the function(s)
generated. Read only.
Reserved locations. Read and
written as zero.
Pulse Stretcher Enable. Extends
the LED illumination for each en-
abled function occurrence.
0 is disabled, 1 is enabled.
Reserved locations. Read and
written as zero.
Enable Transmit Status Signal.
Indicates PCnet-ISA controller
transmit activity .
0 disables the signal, 1 enables
the signal.
Enable Receive Polarity Signal.
Enables LED pin assertion when
receive polarity is correct on the
10BASE-T port. Clearing the bit
indicates this function is to
be ignored.
Enable Receive Status Signal.
Indicates receive activity on the
network.
0 disables the signal, 1 enables
the signal.
Enable Jabber Signal. Indicates
the PCnet-ISA controller is jab-
bering on the network.
0 disables the signal, 1 enables
the signal.
Enable Collision Signal. Indi-
cates collision activity on the
network.
0 disables the signal, 1 enables
the signal.
ISACSR5
15
LEDOUT
14-8
RES
7
PSE
6-5
RES
4
XMT E
3
RVPOL E
2
RCV E
1
JAB E
0
COL E
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