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參數(shù)資料
| 型號： | AM79C978 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| 中文描述： | 單芯片的1 / 10 Mbps的家庭網(wǎng)絡(luò)控制器的PCI |
| 文件頁數(shù)： | 147/261頁 |
| 文件大?。?/td> | 3803K |
| 代理商： | AM79C978 |
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Am79C978
147
This bit is always read/write ac-
cessible. LEDPE is cleared to 0
by H_RESET and is unaffected
by S_RESET or by setting the
STOP bit.
11-9
RES
Reserved locations. Written and
read as zeros.
8
APROMWE Address PROM Write Enable.
The Am79C978 controller con-
tains a shadow RAM on board for
storage of the first 16 bytes load-
ed from the serial EEPROM.
Accesses to Address PROM I/O
Resources will be directed toward
this RAM. When APROMWE is
set to 1, then write access to the
shadow RAM will be enabled.
This bit is always read/write ac-
cessible. APROMWE is cleared
to 0 by H_RESET and is unaffect-
ed by S_RESET or by setting the
STOP bit.
7
INTLEVEL
Interrupt Level. This bit allows the
interrupt output signals to be pro-
grammed for level or edge-
sensitive applications.
When INTLEVEL is cleared to 0,
the INTA pin is configured for
level-sensitive applications. In
this mode, an interrupt request is
signaled by a low level driven on
the INTA pin by the Am79C978
controller. When the interrupt is
cleared, the INTA pin is tri-stated
by the Am79C978 controller and
allowed to be pulled to a high lev-
el by an external pullup device.
This mode is intended for sys-
tems which allow the interrupt
signal to be shared by multiple
devices.
When INTLEVEL is set to 1, the
INTA pin is configured for edge-
sensitive applications. In this
mode, an interrupt request is sig-
naled by a high level driven on
the INTA pin by the Am79C978
controller. When the interrupt is
cleared, the INTA pin is driven to
a low level by the Am79C978
controller. This mode is intended
for systems that do not allow in-
terrupt channels to be shared by
multiple devices.
INTLEVEL should not be set to 1
when the Am79C978 controller is
used in a PCI bus application.
This bit is always read/write ac-
cessible. INTLEVEL is cleared to
0 by H_RESET and is unaffected
by S_RESET or by setting the
STOP bit.
6-3
RES
Reserved locations. Written as
zeros and read as undefined.
2-0
RES
Reserved locations. Written and
read as zeros.
BCR4: LED0 Status
BCR4 controls the function(s) that the LED0 pin dis-
plays. Multiple functions can be simultaneously en-
abled on this LED pin. The LED display will indicate the
logical OR of the enabled functions. BCR4 defaults to
Link Status (LNKST) with pulse stretcher enabled
(PSE = 1) and is fully programmable.
Note:
When LEDPE (BCR2, bit 12) is set to 1, pro-
gramming of the LED0 Status register is enabled.
When LEDPE is cleared to 0, programming of the
LED0 register is disabled. Writes to those registers will
be ignored.
Note:
Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15
LEDOUT
This bit indicates the current
(non-stretched) value of the LED
output pin. A value of 1 in this bit
indicates that the OR of the en-
abled signals is true.
The logical value of the LEDOUT
status signal is determined by the
settings of the individual Status
Enable bits of the LED register
(bits 8 and 6-0).
This bit is read accessible al-
ways. This bit is read only; writes
have no effect. LEDOUT is unaf-
fected by H_RESET, S_RESET,
or STOP.
14
LEDPOL
LED Polarity. When this bit has
the value 0, then the LED pin will
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C978A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978AKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C978AKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C978AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
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