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參數(shù)資料
| 型號： | AM79C978AKCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| 中文描述： | 5 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 145/256頁 |
| 文件大小： | 3505K |
| 代理商： | AM79C978AKCW |
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Am79C978A
145
BCR2: Miscellaneous Configuration
Note:
Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-14 RES
Reserved locations. Written and
read as zeros.
13
PHYSELEN This bit enables writes to
BCR18[4:3] for software selec-
tion of various operation and
test modes. When PHYSELEN
is set to 0 (default), the two bits
can only be written from the
EEPROM. When PHYSELEN is
set to 1, writes to BCR18[4:3]
are enabled.
This bit is always read/write ac-
cessible. TSTSHDEN is cleared
to 0 by H_RESET and is unaffect-
ed by S_RESET or by setting the
STOP bit.
12
LEDPE
LED Program Enable. When
LEDPE is set to 1, programming
of the LED0 (BCR4), LED1
(BCR5), LED2 (BCR6), LED3
(BCR7), and LED4 (BCR48)
registers is enabled. When
LEDPE is cleared to 0, program-
ming of LED0 (BCR4), LED1
(BCR5), LED2 (BCR6), LED3
(BCR7), and LED4 (BCR48)
registers is disabled. Writes to
those registers will be ignored.
This bit is always read/write ac-
cessible. LEDPE is cleared to 0
by H_RESET and is unaffected
by S_RESET or by setting the
STOP bit.
11-9
RES
Reserved locations. Written and
read as zeros.
8
APROMWE Address PROM Write Enable.
The Am79C978A controller con-
tains a shadow RAM on board for
storage of the first 16 bytes load-
ed from the serial EEPROM.
Accesses to Address PROM I/O
Resources will be directed toward
this RAM. When APROMWE is
set to 1, then write access to the
shadow RAM will be enabled.
This bit is always read/write ac-
cessible. APROMWE is cleared
to 0 by H_RESET and is unaffect-
ed by S_RESET or by setting the
STOP bit.
7
INTLEVEL
Interrupt Level. This bit allows the
interrupt output signals to be pro-
grammed for level or edge-
sensitive applications.
When INTLEVEL is cleared to 0,
the INTA pin is configured for
level-sensitive applications. In
this mode, an interrupt request is
signaled by a low level driven on
the INTA pin by the Am79C978A
controller. When the interrupt is
cleared, the INTA pin is tri-stated
by the Am79C978A controller
and allowed to be pulled to a high
level by an external pullup de-
vice. This mode is intended for
systems which allow the interrupt
signal to be shared by multiple
devices.
When INTLEVEL is set to 1, the
INTA pin is configured for edge-
sensitive applications. In this
mode, an interrupt request is sig-
naled by a high level driven on
the INTA pin by the Am79C978A
controller. When the interrupt is
cleared, the INTA pin is driven to
a low level by the Am79C978A
controller. This mode is intended
for systems that do not allow in-
terrupt channels to be shared by
multiple devices.
INTLEVEL should not be set to 1
when the Am79C978A controller
is used in a PCI bus application.
This bit is always read/write ac-
cessible. INTLEVEL is cleared to
0 by H_RESET and is unaffected
by S_RESET or by setting the
STOP bit.
6-3
RES
Reserved locations. Written as
zeros and read as undefined.
2-0
RES
Reserved locations. Written and
read as zeros.
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| AM79C978AVCW | Single-Chip 1/10 Mbps PCI Home Networking Controller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C978AVCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978KC/W | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978VC/W | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C979BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C98 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Twisted-Pair Ethernet Transceiver (TPEX) |
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