參數(shù)資料
型號(hào)： AM79C978AKCW
廠商： ADVANCED MICRO DEVICES INC
元件分類(lèi)： 微控制器/微處理器
英文描述： Single-Chip 1/10 Mbps PCI Home Networking Controller
中文描述： 5 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP160
封裝： PLASTIC, QFP-160
文件頁(yè)數(shù)： 199/256頁(yè)
文件大?。?/td> 3505K
代理商： AM79C978AKCW
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Am79C978A
199
23
BPE
Bus Parity Error is set by the
Am79C978A controller when a
parity error occurred on the bus
interface during data transfers to
a receive buffer. BPE is valid only
when ENP, OFLO, or BUFF are
set. The Am79C978A controller
will only set BPE when the ad-
vanced parity error handling is
enabled by setting APERREN
(BCR20, bit 10) to 1. BPE is set
by the Am79C978A controller
and cleared by the host.
This bit does not exist when the
Am79C978A controller is pro-
grammed to use 16-bit software
structures for the descriptor ring en-
tries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
22
PAM
Physical Address Match is set by
the Am79C978A controller when
it accepts the received frame due
to a match of the frame
’
s destina-
tion address with the content of
the physical address register.
PAM is valid only when ENP is
set.
PAM
is
Am79C978A
controller
cleared by the host.
set
by
the
and
This bit does not exist when the
Am79C978A controller is pro-
grammed to use 16-bit software
structures for the descriptor ring en-
tries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
21
LAFM
Logical Address Filter Match is
set by the Am79C978A controller
when it accepts the received
frame based on the value in the
logical address filter register.
LAFM is valid only when ENP is
set.
LAFM
is
Am79C978A
controller
cleared by the host.
set
by
the
and
Note that if DRCVBC (CSR15, bit
14) is cleared to 0, only BAM, but
not LAFM will be set when a
Broadcast frame is received,
even if the Logical Address Filter
is programmed in such a way that
a Broadcast frame would pass
the hash filter. If DRCVBC is set
to 1 and the Logical Address Fil-
ter is programmed in such a way
that a Broadcast frame would
pass the hash filter, LAFM will be
set on the reception of a Broad-
cast frame.
This bit does not exist when the
Am79C978A controller is pro-
grammed to use 16-bit software
structures for the descriptor ring en-
tries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
20
BAM
Broadcast Address Match is set
by the Am79C978A controller
when it accepts the received
frame, because the frame
’
s desti-
nation address is of the type
“
Broadcast.
”
BAM is valid only
when ENP is set. BAM is set by
the Am79C978A controller and
cleared by the host.
This bit does not exist when the
Am79C978A controller is pro-
grammed to use 16-bit software
structures for the descriptor ring en-
tries (BCR20, bits 7-0, SWSTYLE is
cleared to 0).
19-16 RES
Reserved locations. These loca-
tions should be read and written
as zeros.
15-12 ONES
These four bits must be written as
ones. They are written by the host
and
unchanged
Am79C978A controller.
by
the
11-0
BCNT
Buffer Byte Count is the length of
the buffer pointed to by this de-
scriptor, expressed as the two's
complement of the length of the
buffer. This field is written by the
host and unchanged by the
Am79C978A controller.
RMD2
Bit
Name
Description
31
ZERO
This field is reserved. The
Am79C978A controller will write a
zero to this location.
30-16 RFRTAG
Receive Frame Tag. Indicates
the Receive Frame Tag applied
from the EADI interface. This
field is user defined and has a
default value of all zeros. When
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參數(shù)描述
AM79C978AVCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
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