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C165UTAH
General Purpose Timer Unit
Data Sheet
213
2001-02-23
modes such as gated timer or counter mode, or may be concatenated with another timer
of the same block.
Block 1 contains 3 timers/counters with a maximum resolution of f
Timer
/4. The auxiliary
timers of GPT1 may optionally be configured as reload or capture registers for the core
timer.
Block 2 contains 2 internal timers/counters with a maximum resolution of f
Timer
/2. An
additional CAPREL register supports capture and reload operation with extended
functionality.
The following enumeration summarizes all features to be supported:
Timer Block 1:
– f
Timer
/4 maximum resolution.
– 3 independent timers/counters.
– Timers/counters can be concatenated.
– 4 operating modes (timer, gated timer, counter, incremental).
– Separate interrupt nodes.
Timer Block 2:
– f
Timer
/2 maximum resolution.
– 2 independent timers/counters.
– Timers/counters can be concatenated.
– 2 operating modes (timer, counter).
– Capture/reload functions via 16-bit Capture/Reload register CAPREL.
– Separate interrupt nodes.
11.1
Kernel Description
11.1.1
Functional Description of Timer Block 1
All three timers of block 1 (T2, T3, T4) can run in 4 basic modes, which are timer, gated
timer, counter and incremental interface mode, and all timers can either count up or
down.
The input line (TxIN) associated with it which serves as the gate control in gated timer
mode, or as the count input in counter mode. The count direction (Up / Down) may be
programmed via software or may be dynamically altered by a signal at an external
control input line. An overflow/underflow of core timer T3 is indicated by the output toggle
latch T3OTL whose state may be output on related line T3OUT.
The auxiliary timers T2 and T4 may additionally be concatenated with the core timer, or
used as capture or reload registers for the core timer.