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C165UTAH
General Purpose Timer Unit
Data Sheet
220
2001-02-23
Note:
In the C165UTAH, the T3EUD timer input is connected to P3.5. In this case,
Timer 4 input T4IN can be used by Software only.
T3 is clocked by each transition on one or both of the external input lines which gives 2-
fold or 4-fold resolution of the encoder input.
Figure 63
Block Diagram of Core Timer T3 in Incremental Interface Mode
Bit field T3I in control register T3CON selects the triggering transitions (see table below).
In this mode the sequence of the transitions of the two input signals is evaluated and
generates count pulses as well as the direction signal. Depending on the chosen
Incremental Intrerface Mode, Rotation detection ‘110
B
’ or Edge Detection ‘111
B
’, an
interrupt can be generated. This interrupt is only generated if it’s enabled by setting bit
T3IREN in register T3CON. For the Rotation detection an interrupt will be generated
each time the count direction of timer 3 changes. For the Edge detection an interrupt will
be generated each time a count action for timer 3 occurs. Count direction, changes in
the count direction and count requests are monitored through the status bits T3RDIR,
T3CHDIR and T3EDGE in register T3CON. T3 is modified automatically according to the
speed and the direction of the incremental encoder. Therefore, the contents of timer T3
always represents the encoder’s current position.
The incremental encoder can be connected directly to the microcontroller without
external interface logic. In a standard system, however, comparators will be employed
to convert the encoder’s differential outputs (e.g. A, A) to digital signals (e.g. A). This
greatly increases noise immunity.
Edge
Select
Timer T3
XOR
MUX
1
T3EUD
T3UDE
MCB03998
T3l
T3IN
T3OTL
Interrupt
Request
Edge
Interrupt
T3OUT
Phase
Detect
T3OE
T3R
T3
Edge
T3UD
T3
CHDIR
0
Change
Detection
T3
RDIR
Rotation
Interrupt
T3M
Up/
Down
T3M