參數(shù)資料
型號(hào): COP8CDR9KMT8
廠商: National Semiconductor
文件頁數(shù): 109/111頁
文件大?。?/td> 0K
描述: IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝: 34
系列: COP8™ 8C
核心處理器: COP8
芯體尺寸: 8-位
速度: 20MHz
連通性: Microwire/Plus(SPI),UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 49
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
包裝: 管件
其它名稱: *COP8CDR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Symbols
[B]
Memory Indirectly Addressed by B Register
[X]
Memory Indirectly Addressed by X Register
MD
Direct Addressed Memory
Mem
Direct Addressed Memory or [B]
Meml
Direct Addressed Memory or [B] or Immediate Data
Imm
8-Bit Immediate Data
Reg
Register Memory: Addresses F0 to FF (Includes B, X and SP)
Bit
Bit Number (0 to 7)
Loaded with
Exchanged with
5.19.6 INSTRUCTION SET SUMMARY
ADD
A,Meml
ADD
A
←A + Meml
ADC
A,Meml
ADD with Carry
A
←A + Meml + C, C←Carry,
HC
←Half Carry
SUBC
A,Meml
Subtract with Carry
A
←A MemI + C, C←Carry,
HC
←Half Carry
AND
A,Meml
Logical AND
A
←A and Meml
ANDSZ
A,Imm
Logical AND Immed., Skip if Zero
Skip next if (A and Imm) = 0
OR
A,Meml
Logical OR
A
←A or Meml
XOR
A,Meml
Logical EXclusive OR
A
←A xor Meml
IFEQ
MD,Imm
IF EQual
Compare MD and Imm, Do next if MD = Imm
IFEQ
A,Meml
IF EQual
Compare A and Meml, Do next if A = Meml
IFNE
A,Meml
IF Not Equal
Compare A and Meml, Do next if A
≠ Meml
IFGT
A,Meml
IF Greater Than
Compare A and Meml, Do next if A > Meml
IFBNE
#
If B Not Equal
Do next if lower 4 bits of B
≠ Imm
DRSZ
Reg
Decrement Reg., Skip if Zero
Reg
←Reg 1, Skip if Reg = 0
SBIT
#,Mem
Set BIT
1 to bit, Mem (bit = 0 to 7 immediate)
RBIT
#,Mem
Reset BIT
0 to bit, Mem
IFBIT
#,Mem
IF BIT
If bit #,A or Mem is true do next instruction
RPND
Reset PeNDing Flag
Reset Software Interrupt Pending Flag
X
A,Mem
EXchange A with Memory
A
Mem
X
A,[X]
EXchange A with Memory [X]
A
[X]
LD
A,Meml
LoaD A with Memory
A
←Meml
LD
A,[X]
LoaD A with Memory [X]
A
←[X]
LD
B,Imm
LoaD B with Immed.
B
←Imm
LD
Mem,Imm
LoaD Memory Immed.
Mem
←Imm
LD
Reg,Imm
LoaD Register Memory Immed.
Reg
←Imm
X
A, [B±]
EXchange A with Memory [B]
A
[B], (B←B±1)
X
A, [X±]
EXchange A with Memory [X]
A
[X], (X←X±1)
LD
A, [B±]
LoaD A with Memory [B]
A
←[B], (B←B±1)
LD
A, [X±]
LoaD A with Memory [X]
A
←[X], (X←X±1)
LD
[B±],Imm
LoaD Memory [B] Immed.
[B]
←Imm, (B←B±1)
CLR
A
CLeaR A
A
←0
INC
A
INCrement A
A
←A + 1
DEC
A
DECrement A
A
←A 1
LAID
Load A InDirect from ROM
A
←ROM (PU,A)
DCOR
A
Decimal CORrect A
A
←BCD correction of A (follows ADC, SUBC)
RRC
A
Rotate A Right thru C
C
→A7→…→A0→C
Copyright 2000–2013, Texas Instruments Incorporated
Functional Description
97
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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