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參數(shù)資料
| 型號： | CY7C1347D-250BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 36 CACHE SRAM, 2.4 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, FBGA-119 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大小： | 2790K |
| 代理商： | CY7C1347D-250BGC |
CY7C1347D
Document #: 38-05022 Rev. *E
Page 12 of 21
Instruction Codes
Instruction
Code
Description
EXTEST
000
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all
device outputs to High-Z state. This instruction is not IEEE 1149.1-compliant.
IDCODE
001
Preloads ID register with vendor ID code and places it between TDI and TDO. This instruction
does not affect device operations.
SAMPLE-Z
010
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all
device outputs to High-Z state.
RESERVED
011
Do not use these instructions; they are reserved for future use.
SAMPLE/PRELOAD
100
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. This
instruction does not affect device operations. This instruction does not implement IEEE 1149.1
PRELOAD function and is therefore not 1149.1-compliant.
RESERVED
101
Do not use these instructions; they are reserved for future use.
RESERVED
110
Do not use these instructions; they are reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This instruction does not affect device opera-
tions.
Boundary Scan Order
Bit#
Signal Name
TQFP
Bump ID
1A
44
2R
2A
45
3T
3A
46
4T
4A
47
5T
5A
48
6R
6A
49
3B
7A
50
5B
8DQa
51
6P
9DQa
52
7N
10
DQa536M
11
DQa
56
7L
12
DQa
57
6K
13
DQa
58
7P
14
DQa
59
6N
15
DQa
62
6L
16
DQa
63
7K
17
ZZ
64
7T
18
DQb
68
6H
19
DQb
69
7G
20
DQb
72
6F
21
DQb
73
7E
22
DQb
74
6D
23
DQb
75
7H
24
DQb
78
6G
25
DQb
79
6E
26
DQb
80
7D
27
A
81
6A
28
A
82
5A
29
ADV
83
4G
30
ADSP
84
4A
31
ADSC
85
4B
32
OE
86
64F
33
BWE
87
4M
34
GW
88
4H
35
CLK
89
4K
36
CE2
92
6B
37
BWa
93
5L
38
BWb
94
5G
39
BWc
95
3G
40
BWd
96
3L
41
CE2
97
2B
42
CE
98
4E
43
A
99
3A
44
A
100
2A
45
DQc
1
2D
46
DQc
2
1E
47
DQc
3
2F
48
DQc
6
1G
49
DQc
7
2H
50
DQc
8
1D
51
DQc
9
2E
52
DQc
12
2G
53
DQc
13
1H
54
NC
14
5R
55
DQd
18
2K
56
DQd
19
1L
57
DQd
22
2M
58
DQd
23
1N
Boundary Scan Order (continued)
Bit#
Signal Name
TQFP
Bump ID
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1347DP | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1347F-100AC | 功能描述:IC SRAM 4.5MBIT 100MHZ 100LQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設備封裝:48-TSOP 包裝:托盤 |
| CY7C1347F-133AC | 功能描述:IC SRAM 4.5MBIT 133MHZ 100LQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設備封裝:48-TSOP 包裝:托盤 |
| CY7C1347F-133BGI | 制造商:Rochester Electronics LLC 功能描述:4M- 128KX36 3.3V PIPELINE 1CD STD. SPEED-SYNCHRONOUS SRAM - Bulk |
| CY7C1347F-166BGCT | 制造商:Cypress Semiconductor 功能描述: |
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