參數(shù)資料
型號: CY7C1371AV25-66AC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 512K X 36 ZBT SRAM, 10 ns, PQFP100
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
文件頁數(shù): 11/26頁
文件大小: 333K
代理商: CY7C1371AV25-66AC
CY7C1371AV25
CY7C1373AV25
PRELIMINARY
19
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... 65°C to +150°C
Ambient Temperature with
Power Applied
.................................................. 55°C to +125°C
Supply Voltage on VDD Relative to GND .........0.5V to +3.6V
DC Voltage Applied to Outputs
in High Z State[12]
....................................0.5V to V
DDQ + 0.5V
DC Input Voltage[12]
................................0.5V to V
DDQ + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... >200 mA
Operating Range
Range
Ambient
Temperature[11]
VDD/VDDQ
Com’l
0
°C to +70°C
2.5V
± 5%
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Max.
Unit
VDD
Power Supply Voltage
2.375
2.625
V
VDDQ
I/O Supply Voltage
2.375
2.625
V
VOH
Output HIGH Voltage
VDD = Min., IOH = 1.0 mA
[13]
2.0
V
VOL
Output LOW Voltage
VDD = Min., IOL = 1.0 mA
[13]
0.2
V
VIH
Input HIGH Voltage
1.7
VDD +
0.3V
V
VIL
Input LOW Voltage[12]
0.3
0.7
V
IX
Input Load Current
GND
≤ V
I ≤ VDDQ
5
A
Input Current of MODE
30
A
IOZ
Output Leakage
Current
GND
≤ V
I ≤ VDDQ, Output Disabled
5
A
IDD
VDD Operating Supply
VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
10-ns cycle, 117 MHz
250
mA
12-ns cycle, 100 MHz
230
mA
15-ns cycle, 83MHz
215
mA
15-ns cycle, 66MHz
180
mA
ISB1
Automatic CE
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL
f = fMAX = 1/tCYC
10- ns cycle, 117 MHz
90
mA
12-ns cycle, 100 MHz
80
mA
15-ns cycle, 83MHz
75
mA
15-ns cycle, 66MHz
65
mA
ISB2
Automatic CE
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected,
VIN ≤ 0.3V or VIN > VDDQ 0.3V,
f
= 0
All speed grades
30
mA
ISB3
Automatic CE
Power-Down
Current—CMOS Inputs
Max. VDD, Device Deselected, or
VIN ≤ 0.3V or VIN > VDDQ 0.3V,
f = fMAX = 1/tCYC
10- ns cycle, 117 MHz
85
mA
12-ns cycle, 100 MHz
70
mA
15-ns cycle, 83MHz
65
mA
15-ns cycle, 66MHz
55
mA
ISB4
Automatic CE
Power-Down
Current—TTL Inputs
Max. VDD, Device Deselected,
VIN ≥ VIH or VIN ≤ VIL, f = 0
All speed grades
40
mA
Shaded areas contain advance information.
Notes:
11. TA is the case temperature.
12. Minimum voltage equals
2.0V for pulse durations of less than 20 ns.
13. The load used for VOH and VOL testing is shown in figure (b) of the AC Test Loads.
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